Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.63 -> 1.64
---
Log message:
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering
interface,making isMaskedValueZeroForTargetNode simpler, and useable from other
partsof the compiler.
---
Diffs of the changes: (+4 -6)
SparcV8ISelDAGToDAG.cpp | 10 ++++------
1 files changed, 4 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.63
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.64
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.63 Sun Jan 29
21:51:45 2006
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sun Jan 29 22:09:04 2006
@@ -62,8 +62,7 @@
/// be zero. Op is expected to be a target specific node. Used by DAG
/// combiner.
virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,
- uint64_t Mask,
- MVIZFnPtr MVIZ) const;
+ uint64_t Mask) const;
virtual std::vector<SDOperand>
LowerArguments(Function &F, SelectionDAG &DAG);
@@ -203,16 +202,15 @@
/// be zero. Op is expected to be a target specific node. Used by DAG
/// combiner.
bool SparcV8TargetLowering::
-isMaskedValueZeroForTargetNode(const SDOperand &Op, uint64_t Mask,
- MVIZFnPtr MVIZ) const {
+isMaskedValueZeroForTargetNode(const SDOperand &Op, uint64_t Mask) const {
switch (Op.getOpcode()) {
default: return false;
case V8ISD::SELECT_ICC:
case V8ISD::SELECT_FCC:
assert(MVT::isInteger(Op.getValueType()) && "Not an integer select!");
// These operations are masked zero if both the left and the right are
zero.
- return MVIZ(Op.getOperand(0), Mask, *this) &&
- MVIZ(Op.getOperand(1), Mask, *this);
+ return MaskedValueIsZero(Op.getOperand(0), Mask) &&
+ MaskedValueIsZero(Op.getOperand(1), Mask);
}
}
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