Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.46 -> 1.47 --- Log message: Fix lowering of calls which return f32 values. --- Diffs of the changes: (+12 -0) X86ISelLowering.cpp | 12 ++++++++++++ 1 files changed, 12 insertions(+) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.46 llvm/lib/Target/X86/X86ISelLowering.cpp:1.47 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.46 Mon Jan 16 20:32:49 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Tue Jan 17 15:58:21 2006 @@ -548,6 +548,7 @@ Chain = Hi.getValue(1); break; } + case MVT::f32: case MVT::f64: { std::vector<MVT::ValueType> Tys; Tys.push_back(MVT::f64); @@ -580,6 +581,11 @@ DAG.getSrcValue(NULL)); Chain = RetVal.getValue(1); } + + if (RetTyVT == MVT::f32 && !X86ScalarSSE) + // FIXME: we would really like to remember that this FP_ROUND + // operation is okay to eliminate if we allow excess FP precision. + RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal); break; } } @@ -1068,6 +1074,7 @@ Chain = Hi.getValue(1); break; } + case MVT::f32: case MVT::f64: { std::vector<MVT::ValueType> Tys; Tys.push_back(MVT::f64); @@ -1100,6 +1107,11 @@ DAG.getSrcValue(NULL)); Chain = RetVal.getValue(1); } + + if (RetTyVT == MVT::f32 && !X86ScalarSSE) + // FIXME: we would really like to remember that this FP_ROUND + // operation is okay to eliminate if we allow excess FP precision. + RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal); break; } } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits