Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.43 -> 1.44
X86InstrInfo.td updated: 1.209 -> 1.210
---
Log message:
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
read a flag.
---
Diffs of the changes: (+12 -10)
X86ISelLowering.cpp | 18 ++++++++++--------
X86InstrInfo.td | 4 ++--
2 files changed, 12 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.43
llvm/lib/Target/X86/X86ISelLowering.cpp:1.44
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.43 Mon Jan 16 15:21:29 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Mon Jan 16 18:19:47 2006
@@ -543,16 +543,17 @@
Chain = Hi.getValue(1);
break;
}
- case MVT::f32:
case MVT::f64: {
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
+ Tys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(InFlag);
RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, Ops);
- Chain = RetVal.getValue(1);
+ Chain = RetVal.getValue(1);
+ InFlag = RetVal.getValue(2);
if (X86ScalarSSE) {
unsigned Size = MVT::getSizeInBits(MVT::f64)/8;
MachineFunction &MF = DAG.getMachineFunction();
@@ -565,12 +566,12 @@
Ops.push_back(RetVal);
Ops.push_back(StackSlot);
Ops.push_back(DAG.getValueType(RetTyVT));
+ Ops.push_back(InFlag);
Chain = DAG.getNode(X86ISD::FST, Tys, Ops);
RetVal = DAG.getLoad(RetTyVT, Chain, StackSlot,
DAG.getSrcValue(NULL));
Chain = RetVal.getValue(1);
- } else if (RetTyVT == MVT::f32)
- RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
+ }
break;
}
}
@@ -1059,16 +1060,17 @@
Chain = Hi.getValue(1);
break;
}
- case MVT::f32:
case MVT::f64: {
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
+ Tys.push_back(MVT::Flag);
std::vector<SDOperand> Ops;
Ops.push_back(Chain);
Ops.push_back(InFlag);
RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, Ops);
- Chain = RetVal.getValue(1);
+ Chain = RetVal.getValue(1);
+ InFlag = RetVal.getValue(2);
if (X86ScalarSSE) {
unsigned Size = MVT::getSizeInBits(MVT::f64)/8;
MachineFunction &MF = DAG.getMachineFunction();
@@ -1081,12 +1083,12 @@
Ops.push_back(RetVal);
Ops.push_back(StackSlot);
Ops.push_back(DAG.getValueType(RetTyVT));
+ Ops.push_back(InFlag);
Chain = DAG.getNode(X86ISD::FST, Tys, Ops);
RetVal = DAG.getLoad(RetTyVT, Chain, StackSlot,
DAG.getSrcValue(NULL));
Chain = RetVal.getValue(1);
- } else if (RetTyVT == MVT::f32)
- RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
+ }
break;
}
}
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.209
llvm/lib/Target/X86/X86InstrInfo.td:1.210
--- llvm/lib/Target/X86/X86InstrInfo.td:1.209 Mon Jan 16 17:26:53 2006
+++ llvm/lib/Target/X86/X86InstrInfo.td Mon Jan 16 18:19:47 2006
@@ -93,14 +93,14 @@
[SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
def X86fpget : SDNode<"X86ISD::FP_GET_RESULT", SDTX86FpGet,
- [SDNPHasChain, SDNPInFlag]>;
+ [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
def X86fpset : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet,
[SDNPHasChain, SDNPOutFlag]>;
def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld,
[SDNPHasChain]>;
def X86fst : SDNode<"X86ISD::FST", SDTX86Fst,
- [SDNPHasChain]>;
+ [SDNPHasChain, SDNPInFlag]>;
def X86fild : SDNode<"X86ISD::FILD", SDTX86Fild,
[SDNPHasChain]>;
def X86fp_to_i16mem : SDNode<"X86ISD::FP_TO_INT16_IN_MEM", SDTX86FpToIMem,
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