> Changes in directory llvm/lib/Target/Alpha: > > AlphaInstrInfo.td updated: 1.90 -> 1.91 > --- > Log message: > > Added field noResults to Instruction. > Currently tblgen cannot tell which operands in the operand list are results > so it assumes the first one is a result. This is bad. Ideally we would fix > this by separating results from inputs, e.g. (res R32:$dst), > (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding > 'let noResults = 1' is the workaround to tell tblgen that the instruction > does not produces a result. It works for now since tblgen does not support > instructions which produce multiple results. > > > --- > Diffs of the changes: (+5 -5) > > AlphaInstrInfo.td | 10 +++++----- > 1 files changed, 5 insertions(+), 5 deletions(-) > > > Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td > diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.90 > llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.91 --- > llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.90 Sun Dec 25 11:36:48 2005 +++ > llvm/lib/Target/Alpha/AlphaInstrInfo.td Mon Dec 26 03:11:44 2005 @@ > -404,14 > +404,14 @@ > def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, > immUExt8:$Y), 0)>; > > > -let isReturn = 1, isTerminator = 1 in > +let isReturn = 1, isTerminator = 1, noResults = 1 in > def RET : MbrForm< 0x1A, 0x02, (ops GPRC:$RD, GPRC:$RS, s64imm:$DISP), > "ret $RD,($RS),$DISP">; //Return from subroutine //DAG Version: > -let isReturn = 1, isTerminator = 1, Ra = 31, Rb = 26, disp = 1, Uses = > [R26] in +let isReturn = 1, isTerminator = 1, noResults = 1, Ra = 31, Rb = > 26, disp = 1, Uses = [R26] in def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret > $$31,($$26),1">; //Return from subroutine > > def JMP : MbrForm< 0x1A, 0x00, (ops GPRC:$RD, GPRC:$RS, GPRC:$DISP), "jmp > $RD,($RS),$DISP">; //Jump -let isCall = 1, Ra = 26, > +let isCall = 1, noResults = 1, Ra = 26, > Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, > R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, > F0, F1, > @@ -419,7 +419,7 @@ > F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30], Uses = > [R29] in { def BSR : BFormD<0x34, "bsr $$26,$$$DISP..ng", []>; //Branch to > subroutine } > -let isCall = 1, > +let isCall = 1, noResults = 1, > Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, > R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, > F0, F1, > @@ -428,7 +428,7 @@ > def JSR : MbrForm< 0x1A, 0x01, (ops ), "jsr $$26,($$27),0">; //Jump to > subroutine } > > -let isCall = 1, Defs = [R23, R24, R25, R27, R28], Uses = [R24, R25, R27] > in +let isCall = 1, noResults = 1, Defs = [R23, R24, R25, R27, R28], Uses = > [R24, R25, R27] in def JSRs : MbrForm< 0x1A, 0x01, (ops ), "jsr > $$23,($$27),0">; //Jump to div or rem
things like JSR and BSR and BR and reg do return results, but I guess the only uses can be hidden with the use of flags. What I really need to remove hacks is a way to force a results to be in a certain register that doesn't depend on the register allocator optionally doing the right thing. This is easy in the PatternISel, but not in the DAG. maybe like (ops GPRC:$RD = R27, GPRC:$RS) or let constraints = (constrain GPRC:$RD = 27) in ... not that there are enough hacks around this to be worth it. _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits