Changes in directory llvm/lib/Target/SparcV8:
SparcV8ISelDAGToDAG.cpp updated: 1.24 -> 1.25
SparcV8ISelSimple.cpp updated: 1.97 -> 1.98
SparcV8RegisterInfo.cpp updated: 1.28 -> 1.29
SparcV8RegisterInfo.td updated: 1.25 -> 1.26
---
Log message:
Elimiante SP and FP, which weren't members of the IntRegs register class
---
Diffs of the changes: (+13 -29)
SparcV8ISelDAGToDAG.cpp | 2 +-
SparcV8ISelSimple.cpp | 18 +++++++++---------
SparcV8RegisterInfo.cpp | 19 +++----------------
SparcV8RegisterInfo.td | 3 ---
4 files changed, 13 insertions(+), 29 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.24
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.25
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.24 Sun Dec 18
17:07:11 2005
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sun Dec 18 18:06:52 2005
@@ -450,7 +450,7 @@
if (ValToStore.Val) {
if (!StackPtr.Val) {
- StackPtr = DAG.getCopyFromReg(DAG.getEntryNode(), V8::SP, MVT::i32);
+ StackPtr = DAG.getCopyFromReg(DAG.getEntryNode(), V8::O6, MVT::i32);
NullSV = DAG.getSrcValue(NULL);
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
Index: llvm/lib/Target/SparcV8/SparcV8ISelSimple.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelSimple.cpp:1.97
llvm/lib/Target/SparcV8/SparcV8ISelSimple.cpp:1.98
--- llvm/lib/Target/SparcV8/SparcV8ISelSimple.cpp:1.97 Sun Dec 18 17:10:57 2005
+++ llvm/lib/Target/SparcV8/SparcV8ISelSimple.cpp Sun Dec 18 18:06:52 2005
@@ -879,7 +879,7 @@
"About to dereference past end of OutgoingArgRegs");
BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
} else {
- BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (ArgReg);
}
ArgOffset += 4;
@@ -894,7 +894,7 @@
"About to dereference past end of OutgoingArgRegs");
BuildMI (BB, V8::LDri, 2, *OAR++).addFrameIndex (FI).addSImm (0);
} else {
- BuildMI (BB, V8::STFri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STFri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (ArgReg);
}
ArgOffset += 4;
@@ -913,7 +913,7 @@
} else {
unsigned TempReg = makeAnotherReg (Type::IntTy);
BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (0);
- BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (TempReg);
}
ArgOffset += 4;
@@ -924,7 +924,7 @@
} else {
unsigned TempReg = makeAnotherReg (Type::IntTy);
BuildMI (BB, V8::LDri, 2, TempReg).addFrameIndex (FI).addSImm (4);
- BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (TempReg);
}
ArgOffset += 4;
@@ -935,7 +935,7 @@
"About to dereference past end of OutgoingArgRegs");
BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg);
} else {
- BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (ArgReg);
}
ArgOffset += 4;
@@ -945,7 +945,7 @@
"About to dereference past end of OutgoingArgRegs");
BuildMI (BB, V8::ORrr, 2, *OAR++).addReg (V8::G0).addReg (ArgReg+1);
} else {
- BuildMI (BB, V8::STri, 3).addReg (V8::SP).addSImm (ArgOffset)
+ BuildMI (BB, V8::STri, 3).addReg (V8::O6).addSImm (ArgOffset)
.addReg (ArgReg+1);
}
ArgOffset += 4;
@@ -1708,11 +1708,11 @@
BuildMI (BB, V8::ANDri, 2, StackAdjReg).addReg (TmpReg2).addSImm (-8);
// Subtract size from stack pointer, thereby allocating some space.
- BuildMI (BB, V8::SUBrr, 2, V8::SP).addReg (V8::SP).addReg (StackAdjReg);
+ BuildMI (BB, V8::SUBrr, 2, V8::O6).addReg (V8::O6).addReg (StackAdjReg);
// Put a pointer to the space into the result register, by copying
// the stack pointer.
- BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::SP).addSImm (96);
+ BuildMI (BB, V8::ADDri, 2, getReg(I)).addReg (V8::O6).addSImm (96);
// Inform the Frame Information that we have just allocated a variable-sized
// object.
@@ -1755,7 +1755,7 @@
// Add the VarArgsOffset to the frame pointer, and copy it to the result.
unsigned DestReg = getReg (CI.getOperand(1));
unsigned Tmp = makeAnotherReg(Type::IntTy);
- BuildMI (BB, V8::ADDri, 2, Tmp).addReg (V8::FP).addSImm (VarArgsOffset);
+ BuildMI (BB, V8::ADDri, 2, Tmp).addReg (V8::I6).addSImm (VarArgsOffset);
BuildMI(BB, V8::STri, 3).addReg(DestReg).addSImm(0).addReg(Tmp);
return;
}
Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.28
llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.29
--- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp:1.28 Sat Dec 17
14:18:49 2005
+++ llvm/lib/Target/SparcV8/SparcV8RegisterInfo.cpp Sun Dec 18 18:06:52 2005
@@ -25,19 +25,6 @@
: SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN,
V8::ADJCALLSTACKUP) {}
-static const TargetRegisterClass *getClass(unsigned SrcReg) {
- if (V8::IntRegsRegisterClass->contains(SrcReg))
- return V8::IntRegsRegisterClass;
- else if (V8::FPRegsRegisterClass->contains(SrcReg))
- return V8::FPRegsRegisterClass;
- else if (V8::DFPRegsRegisterClass->contains(SrcReg))
- return V8::DFPRegsRegisterClass;
- else {
- std::cerr << "Error: register of unknown class found: " << SrcReg << "\n";
- abort ();
- }
-}
-
void SparcV8RegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, int FrameIdx,
@@ -93,7 +80,7 @@
int size = MI.getOperand (0).getImmedValue ();
if (MI.getOpcode () == V8::ADJCALLSTACKDOWN)
size = -size;
- BuildMI (MBB, I, V8::ADDri, 2, V8::SP).addReg (V8::SP).addSImm (size);
+ BuildMI (MBB, I, V8::ADDri, 2, V8::O6).addReg (V8::O6).addSImm (size);
MBB.erase (I);
}
@@ -109,7 +96,7 @@
int FrameIndex = MI.getOperand(i).getFrameIndex();
// Replace frame index with a frame pointer reference
- MI.SetMachineOperandReg (i, V8::FP);
+ MI.SetMachineOperandReg (i, V8::I6);
// Addressable stack objects are accessed using neg. offsets from %fp
MachineFunction &MF = *MI.getParent()->getParent();
@@ -141,7 +128,7 @@
// is required by the ABI.
NumBytes = (NumBytes + 7) & ~7;
BuildMI(MBB, MBB.begin(), V8::SAVEri, 2,
- V8::SP).addImm(-NumBytes).addReg(V8::SP);
+ V8::O6).addImm(-NumBytes).addReg(V8::O6);
}
void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
Index: llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td:1.25
llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td:1.26
--- llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td:1.25 Sat Dec 17 19:20:35 2005
+++ llvm/lib/Target/SparcV8/SparcV8RegisterInfo.td Sun Dec 18 18:06:52 2005
@@ -45,9 +45,6 @@
def I3 : Ri<27, "I3">; def I4 : Ri<28, "I4">; def I5 : Ri<29, "I5">;
def I6 : Ri<30, "I6">; def I7 : Ri<31, "I7">;
-// Standard register aliases
-def SP : Ri<14, "SP">; def FP : Ri<30, "FP">;
-
// Floating-point registers
def F0 : Rf< 0, "F0">; def F1 : Rf< 1, "F1">; def F2 : Rf< 2, "F2">;
def F3 : Rf< 3, "F3">; def F4 : Rf< 4, "F4">; def F5 : Rf< 5, "F5">;
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