Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.7 -> 1.8 X86InstrInfo.td updated: 1.151 -> 1.152 --- Log message: * Added X86 store patterns. * Added X86 dec patterns. --- Diffs of the changes: (+19 -43) X86ISelDAGToDAG.cpp | 33 --------------------------------- X86InstrInfo.td | 29 +++++++++++++++++++---------- 2 files changed, 19 insertions(+), 43 deletions(-) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.7 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.8 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.7 Wed Dec 7 20:01:35 2005 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Dec 9 18:48:20 2005 @@ -387,39 +387,6 @@ getI16Imm(X86Lowering.getBytesToPopOnReturn()), Chain); } - - case ISD::STORE: { - SDOperand Chain = Select(N->getOperand(0)); // Token chain. - SDOperand Tmp1 = Select(N->getOperand(1)); - Opc = 0; - if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(1))) { - switch (CN->getValueType(0)) { - default: assert(0 && "Invalid type for operation!"); - case MVT::i1: - case MVT::i8: Opc = X86::MOV8mi; break; - case MVT::i16: Opc = X86::MOV16mi; break; - case MVT::i32: Opc = X86::MOV32mi; break; - } - } - - if (!Opc) { - switch (N->getOperand(1).getValueType()) { - default: assert(0 && "Cannot store this type!"); - case MVT::i1: - case MVT::i8: Opc = X86::MOV8mr; break; - case MVT::i16: Opc = X86::MOV16mr; break; - case MVT::i32: Opc = X86::MOV32mr; break; - case MVT::f32: Opc = X86::MOVSSmr; break; - case MVT::f64: Opc = X86::FST64m; break; - } - } - - SDOperand Base, Scale, Index, Disp; - SelectAddr(N->getOperand(2), Base, Scale, Index, Disp); - return CurDAG->SelectNodeTo(N, Opc, MVT::Other, - Base, Scale, Index, Disp, Tmp1, Chain) - .getValue(Op.ResNo); - } } return SelectCode(Op); Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.151 llvm/lib/Target/X86/X86InstrInfo.td:1.152 --- llvm/lib/Target/X86/X86InstrInfo.td:1.151 Fri Dec 9 16:48:48 2005 +++ llvm/lib/Target/X86/X86InstrInfo.td Fri Dec 9 18:48:20 2005 @@ -378,11 +378,14 @@ "mov{l} {$src, $dst|$dst, $src}", [(set R32:$dst, imm:$src)]>; def MOV8mi : Ii8 <0xC6, MRM0m, (ops i8mem :$dst, i8imm :$src), - "mov{b} {$src, $dst|$dst, $src}", []>; + "mov{b} {$src, $dst|$dst, $src}", + [(store (i8 imm:$src), addr:$dst)]>; def MOV16mi : Ii16<0xC7, MRM0m, (ops i16mem:$dst, i16imm:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w} {$src, $dst|$dst, $src}", + [(store (i16 imm:$src), addr:$dst)]>, OpSize; def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l} {$src, $dst|$dst, $src}", + [(store (i32 imm:$src), addr:$dst)]>; def MOV8rm : I<0x8A, MRMSrcMem, (ops R8 :$dst, i8mem :$src), "mov{b} {$src, $dst|$dst, $src}", @@ -395,11 +398,14 @@ [(set R32:$dst, (load addr:$src))]>; def MOV8mr : I<0x88, MRMDestMem, (ops i8mem :$dst, R8 :$src), - "mov{b} {$src, $dst|$dst, $src}", []>; + "mov{b} {$src, $dst|$dst, $src}", + [(store R8:$src, addr:$dst)]>; def MOV16mr : I<0x89, MRMDestMem, (ops i16mem:$dst, R16:$src), - "mov{w} {$src, $dst|$dst, $src}", []>, OpSize; + "mov{w} {$src, $dst|$dst, $src}", + [(store R16:$src, addr:$dst)]>, OpSize; def MOV32mr : I<0x89, MRMDestMem, (ops i32mem:$dst, R32:$src), - "mov{l} {$src, $dst|$dst, $src}", []>; + "mov{l} {$src, $dst|$dst, $src}", + [(store R32:$src, addr:$dst)]>; //===----------------------------------------------------------------------===// // Fixed-Register Multiplication and Division Instructions... @@ -687,6 +693,7 @@ def NOT32m : I<0xF7, MRM2m, (ops i32mem:$dst), "not{l} $dst", []>; } +// TODO: inc/dec is slow for P4, but fast for Pentium-M. def INC8r : I<0xFE, MRM0r, (ops R8 :$dst, R8 :$src), "inc{b} $dst", [(set R8:$dst, (add R8:$src, 1))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. @@ -701,11 +708,13 @@ def INC32m : I<0xFF, MRM0m, (ops i32mem:$dst), "inc{l} $dst", []>; } -def DEC8r : I<0xFE, MRM1r, (ops R8 :$dst, R8 :$src), "dec{b} $dst", []>; +def DEC8r : I<0xFE, MRM1r, (ops R8 :$dst, R8 :$src), "dec{b} $dst", + [(set R8:$dst, (add R8:$src, -1))]>; let isConvertibleToThreeAddress = 1 in { // Can transform into LEA. -def DEC16r : I<0xFF, MRM1r, (ops R16:$dst, R16:$src), "dec{w} $dst", []>, - OpSize; -def DEC32r : I<0xFF, MRM1r, (ops R32:$dst, R32:$src), "dec{l} $dst", []>; +def DEC16r : I<0xFF, MRM1r, (ops R16:$dst, R16:$src), "dec{w} $dst", + [(set R16:$dst, (add R16:$src, -1))]>, OpSize; +def DEC32r : I<0xFF, MRM1r, (ops R32:$dst, R32:$src), "dec{l} $dst", + [(set R32:$dst, (add R32:$src, -1))]>; } let isTwoAddress = 0 in { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits