Changes in directory llvm/lib/Target/Alpha:
AlphaISelDAGToDAG.cpp updated: 1.13 -> 1.14 --- Log message: more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp --- Diffs of the changes: (+33 -2) AlphaISelDAGToDAG.cpp | 35 +++++++++++++++++++++++++++++++++-- 1 files changed, 33 insertions(+), 2 deletions(-) Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.13 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.14 --- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.13 Mon Dec 5 14:50:53 2005 +++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Tue Dec 6 14:43:30 2005 @@ -155,6 +155,38 @@ return SDOperand(Result.Val, Op.ResNo); } case ISD::BRCOND: { + if (N->getOperand(1).getOpcode() == ISD::SETCC && + MVT::isFloatingPoint(N->getOperand(1).getOperand(0).getValueType())) { + SDOperand Chain = Select(N->getOperand(0)); + SDOperand CC1 = Select(N->getOperand(1).getOperand(0)); + SDOperand CC2 = Select(N->getOperand(1).getOperand(1)); + ISD::CondCode cCode= cast<CondCodeSDNode>(N->getOperand(1).getOperand(2))->get(); + + bool rev = false; + bool isNE = false; + unsigned Opc = Alpha::WTF; + switch(cCode) { + default: N->dump(); assert(0 && "Unknown FP comparison!"); + case ISD::SETEQ: Opc = Alpha::CMPTEQ; break; + case ISD::SETLT: Opc = Alpha::CMPTLT; break; + case ISD::SETLE: Opc = Alpha::CMPTLE; break; + case ISD::SETGT: Opc = Alpha::CMPTLT; rev = true; break; + case ISD::SETGE: Opc = Alpha::CMPTLE; rev = true; break; + case ISD::SETNE: Opc = Alpha::CMPTEQ; isNE = true; break; + }; + SDOperand cmp = CurDAG->getTargetNode(Opc, MVT::f64, + rev?CC2:CC1, + rev?CC1:CC2); + + MachineBasicBlock *Dest = + cast<BasicBlockSDNode>(N->getOperand(2))->getBasicBlock(); + if(isNE) + return CurDAG->SelectNodeTo(N, Alpha::FBEQ, MVT::Other, cmp, + CurDAG->getBasicBlock(Dest), Chain); + else + return CurDAG->SelectNodeTo(N, Alpha::FBNE, MVT::Other, cmp, + CurDAG->getBasicBlock(Dest), Chain); + } SDOperand Chain = Select(N->getOperand(0)); SDOperand CC = Select(N->getOperand(1)); MachineBasicBlock *Dest = @@ -220,10 +252,9 @@ Address, Chain); } - case ISD::BR: + case ISD::BR: return CurDAG->SelectNodeTo(N, Alpha::BR_DAG, MVT::Other, N->getOperand(1), Select(N->getOperand(0))); - case ISD::FrameIndex: { int FI = cast<FrameIndexSDNode>(N)->getIndex(); return CurDAG->SelectNodeTo(N, Alpha::LDA, MVT::i64, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits