Changes in directory llvm/utils/TableGen:
CodeGenRegisters.h updated: 1.8 -> 1.9
CodeGenTarget.cpp updated: 1.45 -> 1.46
DAGISelEmitter.cpp updated: 1.80 -> 1.81
RegisterInfoEmitter.cpp updated: 1.37 -> 1.38
---
Log message:
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.
---
Diffs of the changes: (+57 -17)
CodeGenRegisters.h | 9 ++++++++-
CodeGenTarget.cpp | 28 ++++++++++++++++++++--------
DAGISelEmitter.cpp | 16 ++++++++++------
RegisterInfoEmitter.cpp | 21 +++++++++++++++++++--
4 files changed, 57 insertions(+), 17 deletions(-)
Index: llvm/utils/TableGen/CodeGenRegisters.h
diff -u llvm/utils/TableGen/CodeGenRegisters.h:1.8
llvm/utils/TableGen/CodeGenRegisters.h:1.9
--- llvm/utils/TableGen/CodeGenRegisters.h:1.8 Thu Sep 8 16:43:21 2005
+++ llvm/utils/TableGen/CodeGenRegisters.h Wed Nov 30 22:51:06 2005
@@ -35,13 +35,20 @@
Record *TheDef;
std::string Namespace;
std::vector<Record*> Elements;
+ std::vector<MVT::ValueType> VTs;
unsigned SpillSize;
unsigned SpillAlignment;
- MVT::ValueType VT;
std::string MethodProtos, MethodBodies;
const std::string &getName() const;
+ const MVT::ValueType getValueTypeNum(unsigned VTNum) const {
+ if (VTNum < VTs.size())
+ return VTs[VTNum];
+ assert(0 && "VTNum greater than number of ValueTypes in RegClass!");
+ abort();
+ }
+
CodeGenRegisterClass(Record *R);
};
}
Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.45
llvm/utils/TableGen/CodeGenTarget.cpp:1.46
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.45 Wed Nov 30 18:12:04 2005
+++ llvm/utils/TableGen/CodeGenTarget.cpp Wed Nov 30 22:51:06 2005
@@ -154,13 +154,15 @@
R->setName("AnonRegClass_"+utostr(AnonCounter++));
}
- Namespace = R->getValueAsString("Namespace");
- SpillSize = R->getValueAsInt("Size");
- SpillAlignment = R->getValueAsInt("Alignment");
- VT = getValueType(R->getValueAsDef("RegType"));
-
- MethodBodies = R->getValueAsCode("MethodBodies");
- MethodProtos = R->getValueAsCode("MethodProtos");
+ std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
+ for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
+ Record *Type = TypeList[i];
+ if (!Type->isSubClassOf("ValueType"))
+ throw "RegTypes list member '" + Type->getName() +
+ "' does not derive from the ValueType class!";
+ VTs.push_back(getValueType(Type));
+ }
+ assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
@@ -170,6 +172,15 @@
"' does not derive from the Register class!";
Elements.push_back(Reg);
}
+
+ // Allow targets to override the size in bits of the RegisterClass.
+ unsigned Size = R->getValueAsInt("Size");
+
+ Namespace = R->getValueAsString("Namespace");
+ SpillSize = Size ? Size : MVT::getSizeInBits(VTs[0]);
+ SpillAlignment = R->getValueAsInt("Alignment");
+ MethodBodies = R->getValueAsCode("MethodBodies");
+ MethodProtos = R->getValueAsCode("MethodProtos");
}
const std::string &CodeGenRegisterClass::getName() const {
@@ -179,7 +190,8 @@
void CodeGenTarget::ReadLegalValueTypes() const {
const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
for (unsigned i = 0, e = RCs.size(); i != e; ++i)
- LegalValueTypes.push_back(RCs[i].VT);
+ for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
+ LegalValueTypes.push_back(RCs[i].VTs[ri]);
// Remove duplicates.
std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.80
llvm/utils/TableGen/DAGISelEmitter.cpp:1.81
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.80 Wed Nov 30 18:18:45 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp Wed Nov 30 22:51:06 2005
@@ -455,7 +455,9 @@
// Check to see if this is a register or a register class...
if (R->isSubClassOf("RegisterClass")) {
if (NotRegisters) return MVT::isUnknown;
- return getValueType(R->getValueAsDef("RegType"));
+ const CodeGenRegisterClass &RC =
+ TP.getDAGISelEmitter().getTargetInfo().getRegisterClass(R);
+ return RC.getValueTypeNum(0);
} else if (R->isSubClassOf("PatFrag")) {
// Pattern fragment types will be resolved when they are inlined.
return MVT::isUnknown;
@@ -537,8 +539,9 @@
const CodeGenRegisterClass &RC =
TP.getDAGISelEmitter().getTargetInfo().getRegisterClass(ResultNode);
-
- bool MadeChange = UpdateNodeType(RC.VT, TP);
+
+ // Get the first ValueType in the RegClass, it's as good as any.
+ bool MadeChange = UpdateNodeType(RC.getValueTypeNum(0), TP);
if (getNumChildren() != Inst.getNumOperands())
TP.error("Instruction '" + getOperator()->getName() + " expects " +
@@ -550,7 +553,7 @@
if (OperandNode->isSubClassOf("RegisterClass")) {
const CodeGenRegisterClass &RC =
TP.getDAGISelEmitter().getTargetInfo().getRegisterClass(OperandNode);
- VT = RC.VT;
+ VT = RC.getValueTypeNum(0);
} else if (OperandNode->isSubClassOf("Operand")) {
VT = getValueType(OperandNode->getValueAsDef("Type"));
} else {
@@ -1672,7 +1675,8 @@
<< ".Val)) goto P" << PatternNo << "Fail;\n";
}
-/// getRegisterValueType - Look up and return ValueType of specified record
+/// getRegisterValueType - Look up and return the first ValueType of specified
+/// RegisterClass record
static MVT::ValueType getRegisterValueType(Record *R, const CodeGenTarget &T) {
const std::vector<CodeGenRegisterClass> &RegisterClasses =
T.getRegisterClasses();
@@ -1681,7 +1685,7 @@
const CodeGenRegisterClass &RC = RegisterClasses[i];
for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
if (R == RC.Elements[ei]) {
- return RC.VT;
+ return RC.getValueTypeNum(0);
}
}
}
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.37
llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.38
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.37 Fri Oct 28 17:59:53 2005
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Wed Nov 30 22:51:06 2005
@@ -109,6 +109,7 @@
// belongs to.
std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
+ // Emit the register enum value arrays for each RegisterClass
for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
const CodeGenRegisterClass &RC = RegisterClasses[rc];
@@ -127,6 +128,22 @@
}
OS << "\n };\n\n";
}
+
+ // Emit the ValueType arrays for each RegisterClass
+ for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
+ const CodeGenRegisterClass &RC = RegisterClasses[rc];
+
+ // Give the register class a legal C name if it's anonymous.
+ std::string Name = RC.TheDef->getName() + "VTs";
+
+ // Emit the register list now.
+ OS << " // " << Name
+ << " Register Class Value Types...\n const MVT::ValueType " << Name
+ << "[] = {\n ";
+ for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
+ OS << "MVT::" << RC.VTs[i] << ", ";
+ OS << "MVT::Other\n };\n\n";
+ }
OS << "} // end anonymous namespace\n\n";
// Now that all of the structs have been emitted, emit the instances.
@@ -140,8 +157,8 @@
for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
const CodeGenRegisterClass &RC = RegisterClasses[i];
OS << RC.MethodBodies << "\n";
- OS << RC.getName() << "Class::" << RC.getName()
- << "Class() : TargetRegisterClass(MVT::" << getEnumName(RC.VT) << ","
+ OS << RC.getName() << "Class::" << RC.getName()
+ << "Class() : TargetRegisterClass(" << RC.getName() + "VTs" << ", "
<< RC.SpillSize/8 << ", "
<< RC.SpillAlignment/8 << ", " << RC.getName() << ", "
<< RC.getName() << " + " << RC.Elements.size() << ") {}\n";
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