Changes in directory llvm/lib/Target:
Target.td updated: 1.62 -> 1.63
---
Log message:
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.
---
Diffs of the changes: (+6 -3)
Target.td | 9 ++++++---
1 files changed, 6 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.62 llvm/lib/Target/Target.td:1.63
--- llvm/lib/Target/Target.td:1.62 Mon Nov 28 23:45:29 2005
+++ llvm/lib/Target/Target.td Wed Nov 30 22:51:06 2005
@@ -90,19 +90,22 @@
// register classes. This also defines the default allocation order of
// registers by register allocators.
//
-class RegisterClass<string namespace, ValueType regType, int alignment,
+class RegisterClass<string namespace, list<ValueType> regTypes, int alignment,
list<Register> regList> {
string Namespace = namespace;
// RegType - Specify the ValueType of the registers in this register class.
// Note that all registers in a register class must have the same ValueType.
//
- ValueType RegType = regType;
+ list<ValueType> RegTypes = regTypes;
+
+ // Size - Specify the spill size in bits of the registers. A default value
of
+ // zero lets tablgen pick an appropriate size.
+ int Size = 0;
// Alignment - Specify the alignment required of the registers when they are
// stored or loaded to memory.
//
- int Size = RegType.Size;
int Alignment = alignment;
// MemberList - Specify which registers are in this class. If the
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