Changes in directory llvm/lib/Target:
Makefile updated: 1.24.4.1 -> 1.24.4.2
SubtargetFeature.cpp updated: 1.4 -> 1.4.2.1
Target.td updated: 1.52 -> 1.52.2.1
TargetLowering.cpp updated: 1.12 -> 1.12.2.1
TargetSchedule.td updated: 1.1 -> 1.1.2.1
TargetSelectionDAG.td updated: 1.3 -> 1.3.2.1
---
Log message:
Merged mainline into Vector LLVM branch
---
Diffs of the changes: (+312 -80)
Makefile | 1
SubtargetFeature.cpp | 231 +++++++++++++++++++++++++++++++++++---------------
Target.td | 50 ++++++++++
TargetLowering.cpp | 2
TargetSchedule.td | 19 +---
TargetSelectionDAG.td | 89 ++++++++++++++++++-
6 files changed, 312 insertions(+), 80 deletions(-)
Index: llvm/lib/Target/Makefile
diff -u llvm/lib/Target/Makefile:1.24.4.1 llvm/lib/Target/Makefile:1.24.4.2
--- llvm/lib/Target/Makefile:1.24.4.1 Tue Oct 18 14:21:57 2005
+++ llvm/lib/Target/Makefile Wed Nov 16 12:32:31 2005
@@ -6,6 +6,7 @@
# the University of Illinois Open Source License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
+
LEVEL = ../..
LIBRARYNAME = LLVMTarget
Index: llvm/lib/Target/SubtargetFeature.cpp
diff -u llvm/lib/Target/SubtargetFeature.cpp:1.4
llvm/lib/Target/SubtargetFeature.cpp:1.4.2.1
--- llvm/lib/Target/SubtargetFeature.cpp:1.4 Wed Sep 7 00:44:14 2005
+++ llvm/lib/Target/SubtargetFeature.cpp Wed Nov 16 12:32:31 2005
@@ -12,18 +12,55 @@
//===----------------------------------------------------------------------===//
#include "llvm/Target/SubtargetFeature.h"
-
-#include <string>
+#include "llvm/ADT/StringExtras.h"
#include <algorithm>
-#include <vector>
#include <cassert>
#include <cctype>
-
+#include <iostream>
using namespace llvm;
-/// Splits a string of comma separated items in to a vector of strings.
-void SubtargetFeatures::Split(std::vector<std::string> &V,
- const std::string &S) {
+//===----------------------------------------------------------------------===//
+// Static Helper Functions
+//===----------------------------------------------------------------------===//
+
+/// hasFlag - Determine if a feature has a flag; '+' or '-'
+///
+static inline bool hasFlag(const std::string &Feature) {
+ assert(!Feature.empty() && "Empty string");
+ // Get first character
+ char Ch = Feature[0];
+ // Check if first character is '+' or '-' flag
+ return Ch == '+' || Ch =='-';
+}
+
+/// StripFlag - Return string stripped of flag.
+///
+static inline std::string StripFlag(const std::string &Feature) {
+ return hasFlag(Feature) ? Feature.substr(1) : Feature;
+}
+
+/// isEnabled - Return true if enable flag; '+'.
+///
+static inline bool isEnabled(const std::string &Feature) {
+ assert(!Feature.empty() && "Empty string");
+ // Get first character
+ char Ch = Feature[0];
+ // Check if first character is '+' for enabled
+ return Ch == '+';
+}
+
+/// PrependFlag - Return a string with a prepended flag; '+' or '-'.
+///
+static inline std::string PrependFlag(const std::string &Feature,
+ bool IsEnabled) {
+ assert(!Feature.empty() && "Empty string");
+ if (hasFlag(Feature)) return Feature;
+ return std::string(IsEnabled ? "+" : "-") + Feature;
+}
+
+/// Split - Splits a string of comma separated items in to a vector of strings.
+///
+static void Split(std::vector<std::string> &V, const std::string &S) {
// Start at beginning of string.
size_t Pos = 0;
while (true) {
@@ -43,7 +80,8 @@
}
/// Join a vector of strings to a string with a comma separating each element.
-std::string SubtargetFeatures::Join(const std::vector<std::string> &V) {
+///
+static std::string Join(const std::vector<std::string> &V) {
// Start with empty string.
std::string Result;
// If the vector is not empty
@@ -62,73 +100,108 @@
return Result;
}
-/// Convert a string to lowercase.
-std::string SubtargetFeatures::toLower(const std::string &S) {
- // Copy the string
- std::string Result = S;
- // For each character in string
- for (size_t i = 0; i < Result.size(); i++) {
- // Convert character to lowercase
- Result[i] = std::tolower(Result[i]);
- }
- // Return the lowercased string
- return Result;
-}
-
/// Adding features.
void SubtargetFeatures::AddFeature(const std::string &String,
bool IsEnabled) {
// Don't add empty features
if (!String.empty()) {
// Convert to lowercase, prepend flag and add to vector
- Features.push_back(PrependFlag(toLower(String), IsEnabled));
+ Features.push_back(PrependFlag(LowercaseString(String), IsEnabled));
}
}
-/// Find item in array using binary search.
-const SubtargetFeatureKV *
-SubtargetFeatures::Find(const std::string &S,
- const SubtargetFeatureKV *A, size_t L) {
+/// Find KV in array using binary search.
+template<typename T> const T *Find(const std::string &S, const T *A, size_t L)
{
// Determine the end of the array
- const SubtargetFeatureKV *Hi = A + L;
+ const T *Hi = A + L;
// Binary search the array
- const SubtargetFeatureKV *F = std::lower_bound(A, Hi, S);
+ const T *F = std::lower_bound(A, Hi, S);
// If not found then return NULL
if (F == Hi || std::string(F->Key) != S) return NULL;
// Return the found array item
return F;
}
+/// getLongestEntryLength - Return the length of the longest entry in the
table.
+///
+static size_t getLongestEntryLength(const SubtargetFeatureKV *Table,
+ size_t Size) {
+ size_t MaxLen = 0;
+ for (size_t i = 0; i < Size; i++)
+ MaxLen = std::max(MaxLen, std::strlen(Table[i].Key));
+ return MaxLen;
+}
+
/// Display help for feature choices.
-void SubtargetFeatures::Help(const char *Heading,
- const SubtargetFeatureKV *Table, size_t TableSize) {
- // Determine the length of the longest key
- size_t MaxLen = 0;
- for (size_t i = 0; i < TableSize; i++)
- MaxLen = std::max(MaxLen, std::strlen(Table[i].Key));
- // Print heading
- std::cerr << "Help for " << Heading << " choices\n\n";
- // For each feature
- for (size_t i = 0; i < TableSize; i++) {
- // Compute required padding
- size_t Pad = MaxLen - std::strlen(Table[i].Key) + 1;
- // Print details
- std::cerr << Table[i].Key << std::string(Pad, ' ') << " - "
- << Table[i].Desc << "\n";
- }
- // Wrap it up
- std::cerr << "\n\n";
- // Leave tool
- exit(1);
+///
+static void Help(const SubtargetFeatureKV *CPUTable, size_t CPUTableSize,
+ const SubtargetFeatureKV *FeatTable, size_t FeatTableSize) {
+ // Determine the length of the longest CPU and Feature entries.
+ unsigned MaxCPULen = getLongestEntryLength(CPUTable, CPUTableSize);
+ unsigned MaxFeatLen = getLongestEntryLength(FeatTable, FeatTableSize);
+
+ // Print the CPU table.
+ std::cerr << "Available CPUs for this target:\n\n";
+ for (size_t i = 0; i != CPUTableSize; i++)
+ std::cerr << " " << CPUTable[i].Key
+ << std::string(MaxCPULen - std::strlen(CPUTable[i].Key), ' ')
+ << " - " << CPUTable[i].Desc << ".\n";
+ std::cerr << "\n";
+
+ // Print the Feature table.
+ std::cerr << "Available features for this target:\n\n";
+ for (size_t i = 0; i != FeatTableSize; i++)
+ std::cerr << " " << FeatTable[i].Key
+ << std::string(MaxFeatLen - std::strlen(FeatTable[i].Key), ' ')
+ << " - " << FeatTable[i].Desc << ".\n";
+ std::cerr << "\n";
+
+ std::cerr << "Use +feature to enable a feature, or -feature to disable it.\n"
+ << "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
+ exit(1);
}
-/// Parse feature string for quick usage.
-uint32_t SubtargetFeatures::Parse(const std::string &String,
- const std::string &DefaultCPU,
- const SubtargetFeatureKV *CPUTable,
- size_t CPUTableSize,
- const SubtargetFeatureKV *FeatureTable,
- size_t FeatureTableSize) {
+//===----------------------------------------------------------------------===//
+// SubtargetFeatures Implementation
+//===----------------------------------------------------------------------===//
+
+SubtargetFeatures::SubtargetFeatures(const std::string &Initial) {
+ // Break up string into separate features
+ Split(Features, Initial);
+}
+
+
+std::string SubtargetFeatures::getString() const {
+ return Join(Features);
+}
+void SubtargetFeatures::setString(const std::string &Initial) {
+ // Throw out old features
+ Features.clear();
+ // Break up string into separate features
+ Split(Features, LowercaseString(Initial));
+}
+
+
+/// setCPU - Set the CPU string. Replaces previous setting. Setting to ""
+/// clears CPU.
+void SubtargetFeatures::setCPU(const std::string &String) {
+ Features[0] = LowercaseString(String);
+}
+
+
+/// setCPUIfNone - Setting CPU string only if no string is set.
+///
+void SubtargetFeatures::setCPUIfNone(const std::string &String) {
+ if (Features[0].empty()) setCPU(String);
+}
+
+
+/// getBits - Get feature bits.
+///
+uint32_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
+ size_t CPUTableSize,
+ const SubtargetFeatureKV *FeatureTable,
+ size_t FeatureTableSize) {
assert(CPUTable && "missing CPU table");
assert(FeatureTable && "missing features table");
#ifndef NDEBUG
@@ -141,14 +214,12 @@
"CPU features table is not sorted");
}
#endif
- std::vector<std::string> Features; // Subtarget features as a vector
uint32_t Bits = 0; // Resulting bits
- // Split up features
- Split(Features, String);
- // Check if default is needed
- if (Features[0].empty()) Features[0] = DefaultCPU;
- // Check for help
- if (Features[0] == "help") Help("CPU", CPUTable, CPUTableSize);
+
+ // Check if help is needed
+ if (Features[0] == "help")
+ Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
+
// Find CPU entry
const SubtargetFeatureKV *CPUEntry =
Find(Features[0], CPUTable, CPUTableSize);
@@ -164,10 +235,12 @@
}
// Iterate through each feature
for (size_t i = 1; i < Features.size(); i++) {
- // Get next feature
const std::string &Feature = Features[i];
+
// Check for help
- if (Feature == "+help") Help("feature", FeatureTable, FeatureTableSize);
+ if (Feature == "+help")
+ Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
+
// Find feature in table.
const SubtargetFeatureKV *FeatureEntry =
Find(StripFlag(Feature), FeatureTable,
FeatureTableSize);
@@ -186,7 +259,32 @@
return Bits;
}
-/// Print feature string.
+/// Get info pointer
+void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
+ size_t TableSize) {
+ assert(Table && "missing table");
+#ifndef NDEBUG
+ for (size_t i = 1; i < TableSize; i++) {
+ assert(strcmp(Table[i - 1].Key, Table[i].Key) < 0 && "Table is not
sorted");
+ }
+#endif
+
+ // Find entry
+ const SubtargetInfoKV *Entry = Find(Features[0], Table, TableSize);
+
+ if (Entry) {
+ return Entry->Value;
+ } else {
+ std::cerr << "'" << Features[0]
+ << "' is not a recognized processor for this target"
+ << " (ignoring processor)"
+ << "\n";
+ return NULL;
+ }
+}
+
+/// print - Print feature string.
+///
void SubtargetFeatures::print(std::ostream &OS) const {
for (size_t i = 0; i < Features.size(); i++) {
OS << Features[i] << " ";
@@ -194,7 +292,8 @@
OS << "\n";
}
-/// Dump feature info.
+/// dump - Dump feature info.
+///
void SubtargetFeatures::dump() const {
print(std::cerr);
}
Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/Target.td:1.52 llvm/lib/Target/Target.td:1.52.2.1
--- llvm/lib/Target/Target.td:1.52 Mon Oct 10 01:00:30 2005
+++ llvm/lib/Target/Target.td Wed Nov 16 12:32:31 2005
@@ -113,6 +113,12 @@
//===----------------------------------------------------------------------===//
+// Pull in the common support for scheduling
+//
+include "../TargetSchedule.td"
+
+
+//===----------------------------------------------------------------------===//
// Instruction set description - These classes correspond to the C++ classes in
// the Target/TargetInstrInfo.h file.
//
@@ -147,6 +153,8 @@
bit isTerminator = 0; // Is this part of the terminator for a basic
block?
bit hasDelaySlot = 0; // Does this instruction have an delay slot?
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
+
+ InstrItinClass Itinerary; // Execution steps used for scheduling.
}
@@ -242,6 +250,48 @@
}
//===----------------------------------------------------------------------===//
+// SubtargetFeature - A characteristic of the chip set.
+//
+class SubtargetFeature<string n, string t, string a, string d> {
+ // Name - Feature name. Used by command line (-mattr=) to determine the
+ // appropriate target chip.
+ //
+ string Name = n;
+
+ // Type - Type of attribute to be set by feature.
+ //
+ string Type = t;
+
+ // Attribute - Attribute to be set by feature.
+ //
+ string Attribute = a;
+
+ // Desc - Feature description. Used by command line (-mattr=) to display
help
+ // information.
+ //
+ string Desc = d;
+}
+
+//===----------------------------------------------------------------------===//
+// Processor chip sets - These values represent each of the chip sets supported
+// by the scheduler. Each Processor definition requires corresponding
+// instruction itineraries.
+//
+class Processor<string n, ProcessorItineraries pi, list<SubtargetFeature> f> {
+ // Name - Chip set name. Used by command line (-mcpu=) to determine the
+ // appropriate target chip.
+ //
+ string Name = n;
+
+ // ProcItin - The scheduling information for the target processor.
+ //
+ ProcessorItineraries ProcItin = pi;
+
+ // Features - list of
+ list<SubtargetFeature> Features = f;
+}
+
+//===----------------------------------------------------------------------===//
// Pull in the common support for DAG isel generation
//
include "../TargetSelectionDAG.td"
Index: llvm/lib/Target/TargetLowering.cpp
diff -u llvm/lib/Target/TargetLowering.cpp:1.12
llvm/lib/Target/TargetLowering.cpp:1.12.2.1
--- llvm/lib/Target/TargetLowering.cpp:1.12 Tue Sep 27 17:13:56 2005
+++ llvm/lib/Target/TargetLowering.cpp Wed Nov 16 12:32:31 2005
@@ -30,6 +30,8 @@
maxStoresPerMemSet = maxStoresPerMemCpy = maxStoresPerMemMove = 8;
allowUnalignedMemoryAccesses = false;
UseUnderscoreSetJmpLongJmp = false;
+ IntDivIsCheap = false;
+ Pow2DivIsCheap = false;
}
TargetLowering::~TargetLowering() {}
Index: llvm/lib/Target/TargetSchedule.td
diff -u llvm/lib/Target/TargetSchedule.td:1.1
llvm/lib/Target/TargetSchedule.td:1.1.2.1
--- llvm/lib/Target/TargetSchedule.td:1.1 Tue Oct 18 11:23:40 2005
+++ llvm/lib/Target/TargetSchedule.td Wed Nov 16 12:32:31 2005
@@ -13,13 +13,6 @@
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
-// Processor chip sets - These values represent each of the chip sets supported
-// by the scheduler. Each Processor definition requires corresponding
-// instruction itineraries.
-//
-class Processor;
-
-//===----------------------------------------------------------------------===//
// Processor functional unit - These values represent the function units
// available across all chip sets for the target. Eg., IntUnit, FPUnit, ...
// These may be independent values for each chip set or may be shared across
@@ -35,8 +28,8 @@
// need to complete the stage. Units represent the choice of functional units
// that can be used to complete the stage. Eg. IntUnit1, IntUnit2.
//
-class InstrStage<int latency, list<FuncUnit> units> {
- int Latency = latency; // length of stage in machine cycles
+class InstrStage<int cycles, list<FuncUnit> units> {
+ int Cycles = cycles; // length of stage in machine cycles
list<FuncUnit> Units = units; // choice of functional units
}
@@ -68,7 +61,11 @@
// Processor itineraries - These values represent the set of all itinerary
// classes for a given chip set.
//
-class ProcessorItineraries<Processor proc, list<InstrItinData> iid> {
- Processor Proc = proc;
+class ProcessorItineraries<list<InstrItinData> iid> {
list<InstrItinData> IID = iid;
}
+
+// NoItineraries - A marker that can be used by processors without schedule
+// info.
+def NoItineraries : ProcessorItineraries<[]>;
+
Index: llvm/lib/Target/TargetSelectionDAG.td
diff -u llvm/lib/Target/TargetSelectionDAG.td:1.3
llvm/lib/Target/TargetSelectionDAG.td:1.3.2.1
--- llvm/lib/Target/TargetSelectionDAG.td:1.3 Fri Oct 14 01:40:20 2005
+++ llvm/lib/Target/TargetSelectionDAG.td Wed Nov 16 12:32:31 2005
@@ -68,7 +68,8 @@
// Builtin profiles.
def SDTImm : SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
-def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'
+def SDTVT : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
+def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
]>;
@@ -93,11 +94,25 @@
def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
]>;
+def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
+ SDTCisFP<0>, SDTCisInt<1>
+]>;
+def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
+ SDTCisInt<0>, SDTCisFP<1>
+]>;
def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
SDTCisVTSmallerThanOp<2, 1>
]>;
+def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
+ SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
+]>;
+
+def SDTSelect : SDTypeProfile<1, 3, [ // select
+ SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
+]>;
+
//===----------------------------------------------------------------------===//
// Selection DAG Node Properties.
//
@@ -123,6 +138,8 @@
def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">;
def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">;
+def cond : SDNode<"ISD::CONDCODE" , SDTVT , [], "CondCodeSDNode">;
+def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
[SDNPCommutative, SDNPAssociative]>;
def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
@@ -146,6 +163,8 @@
def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
+def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
+def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>;
def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
@@ -163,6 +182,28 @@
def fround : SDNode<"ISD::FP_ROUND" , SDTFPRoundOp>;
def fextend : SDNode<"ISD::FP_EXTEND" , SDTFPExtendOp>;
+def sint_to_fp : SDNode<"ISD::SINT_TO_FP" , SDTIntToFPOp>;
+def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;
+def fp_to_sint : SDNode<"ISD::FP_TO_SINT" , SDTFPToIntOp>;
+def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
+
+def setcc : SDNode<"ISD::SETCC" , SDTSetCC>;
+def select : SDNode<"ISD::SELECT" , SDTSelect>;
+
+//===----------------------------------------------------------------------===//
+// Selection DAG Condition Codes
+
+class CondCode; // ISD::CondCode enums
+def SETOEQ : CondCode; def SETOGT : CondCode;
+def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
+def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
+def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
+def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
+
+def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
+def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
+
+
//===----------------------------------------------------------------------===//
// Selection DAG Node Transformation Functions.
//
@@ -206,7 +247,6 @@
// Leaf fragments.
def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>;
-def immZero : PatLeaf<(imm), [{ return N->isNullValue(); }]>;
def vtInt : PatLeaf<(vt), [{ return MVT::isInteger(N->getVT()); }]>;
def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT());
}]>;
@@ -214,7 +254,50 @@
// Other helper fragments.
def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
-def ineg : PatFrag<(ops node:$in), (sub immZero, node:$in)>;
+def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
+
+
+// setcc convenience fragments.
+def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETOEQ)>;
+def setogt : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETOGT)>;
+def setoge : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETOGE)>;
+def setolt : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETOLT)>;
+def setole : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETOLE)>;
+def setone : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETONE)>;
+def seto : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETO)>;
+def setuo : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETUO)>;
+def setueq : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETUEQ)>;
+def setugt : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETUGT)>;
+def setuge : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETUGE)>;
+def setult : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETULT)>;
+def setule : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETULE)>;
+def setune : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETUNE)>;
+def seteq : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETEQ)>;
+def setgt : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETGT)>;
+def setge : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETGE)>;
+def setlt : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETLT)>;
+def setle : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETLE)>;
+def setne : PatFrag<(ops node:$lhs, node:$rhs),
+ (setcc node:$lhs, node:$rhs, SETNE)>;
//===----------------------------------------------------------------------===//
// Selection DAG Pattern Support.
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