Issue 203378
Summary [MIPS] assertion failure in `lowerVECTOR_SHUFFLE_VSHF` with `+msa` and `<4 x i128>`
Labels backend:MIPS
Assignees
Reporter folkertdev
    Some code from the rust standard library hits an assertion failure when compiled with `+msa`

https://godbolt.org/z/7f7j4nxTP

```llvm
  define i4 @foo(<4 x i128> %0) {
  start:
    %1 = icmp ne <4 x i128> %0, zeroinitializer
    %2 = bitcast <4 x i1> %1 to i4
    ret i4 %2
 }
```

we get 

```
llc: /root/llvm-project/llvm/lib/Target/Mips/MipsSEISelLowering.cpp:3135: llvm::SDValue lowerVECTOR_SHUFFLE_VSHF(llvm::SDValue, llvm::EVT, const llvm::SmallVector<int, 16>&, bool, llvm::SelectionDAG&): Assertion `Indices[0] >= 0 && "shuffle mask starts with an UNDEF, which is not expected"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel -mtriple=mipsisa64r6el-unknown-linux-gnuabi64 -mattr=+msa -O3 <source>
1.	Running pass 'Function Pass Manager' on module '<source>'.
```

Without `+msa` this compiles just fine

```asm
foo: # @foo
        or      $1, $8, $9
 or      $3, $10, $11
        or      $2, $4, $5
        sltu    $1, $zero, $1
        sltu    $3, $zero, $3
        sltu    $2, $zero, $2
        sll $1, $1, 2
        sll     $3, $3, 3
        or      $1, $3, $1
 or      $3, $6, $7
        sltu    $3, $zero, $3
        sll     $3, $3, 1
        or      $2, $2, $3
        jr      $ra
        or      $2, $2, $1
```
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