| Issue |
181185
|
| Summary |
Teach RISCVVLOptimizer to reduce the VL of reduction pseudo's input vectors
|
| Labels |
backend:RISC-V
|
| Assignees |
|
| Reporter |
lukel97
|
This is from the discussion in https://github.com/llvm/llvm-project/pull/179377#discussion_r2760501434
The RISCVVLOptimizer should be able to reduce the VL of a reduction pseudo's inputs. For example in this case below, %x's VL can be reduced to 2 and %y's VL can be reduced to 1 (only the first lane is read):
```
---
name: vredsum_vv_reduce_input
body: |
bb.0:
liveins: $x1
; CHECK-LABEL: name: vredsum_vv_reduce_input
; CHECK: liveins: $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %vl:gprnox0 = COPY $x1
; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1 /* vl=VLMAX */, 5 /* e32 */, 0 /* tu, mu */
; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1 /* vl=VLMAX */, 5 /* e32 */, 0 /* tu, mu */
; CHECK-NEXT: %z:vr = PseudoVREDSUM_VS_M1_E64 $noreg, %x, $noreg, 2 /* vl */, 6 /* e64 */, 0 /* tu, mu */
; CHECK-NEXT: $v8 = COPY %z
%vl:gprnox0 = COPY $x1
%x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 5 /* e32 */, 0 /* tu, mu */
%y:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 5 /* e32 */, 0 /* tu, mu */
%z:vr = PseudoVREDSUM_VS_M1_E64 $noreg, %x, %y, 2, 6 /* e64 */, 0 /* tu, mu */
$v8 = COPY %z
...
```
Teaching the RISCVVLOptimizer to handle this would help with removing tryToReduceVL in RISCVVectorPeephole.
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