| Issue |
175189
|
| Summary |
[X86] Add handling for llvm.cmul scalar intrinsics on PCLMULQDQ targets
|
| Labels |
good first issue,
backend:X86
|
| Assignees |
|
| Reporter |
RKSimon
|
Generic clmul support was added here:
https://llvm.org/docs/LangRef.html#llvm-clmul-intrinsic
X86 have similar PCLMUL instructions which multiple 2 x i64 operands and create a i128 result, all on the FPU:
https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=clmul&ig_expand=754
This initial ticket should add support for scalar i8/i16/i32/i64 clmul calls by promoting to i64, transferring to <2 x i64>and performing with the PCLMULQDQ instruction.
A suitable X86ISD::PCLMULQDQ opcode needs to be created, mapped in X86IntrinsicsInfo.h/X86InstrFragmentsSIMD.td with the X86::x86_pclmulqdq/x86_pclmulqdq_256/x86_pclmulqdq_512 intrinsics and the isel patterns updating in X86InstrSSE.td/X86InstrAVX512.td
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