| Issue |
174718
|
| Summary |
[PPC] Suspicious AltiVec VAVG patterns
|
| Labels |
backend:PowerPC
|
| Assignees |
|
| Reporter |
RKSimon
|
These patterns are supposed to represent the VAVG instructions:
https://github.com/RKSimon/llvm-project/blob/30fe41b90ed2244a6e8bafe8371c36274996847d/llvm/lib/Target/PowerPC/PPCInstrAltivec.td#L1170-L1189
According to what information I can find (https://www.nxp.com/docs/en/reference-manual/ALTIVECPIM.pdf) these are supposed to match the ISD::AVGCEILS and ISD::AVGCEILU opcodes, but the patterns don't correctly account for overflow:
> Each element of the result is a rounded average of the corresponding elements of a and b. Intermediate calculations are not limited by the element size.
If we can confirm that this is correct it'd be better if we just stripped these patterns directly and just make ISD::AVGCEILS/U lowering legal
Noticed while working on #128377
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