| Issue |
172660
|
| Summary |
lld-link erroneously permits alignment < 4k when using the small code model
|
| Labels |
backend:AArch64,
lld:COFF
|
| Assignees |
|
| Reporter |
ardbiesheuvel
|
The AArch64 code model uses ADRP/ADD instruction pairs to emit symbol references with range of -/+ 4 GiB. The ADRP instruction generates a place-relative value rounded down to 4 KiB, and the lower 12 bits are provided by the subsequent ADD (or LDR) instruction.
Once fully linked, these immediate fields are set in stone (i.e., they are not runtime relocatable). The upshot of this is that the placement of the binary modulo 4 KiB in memory cannot deviate from the placement that the linker anticipated. In practice, this means that the PE/COFF section alignment must be at least 4 KiB.
However, `lld-link` happily permits `/ALIGN:x` directives with values of `x` as small as 32, resulting in incorrect behavior when a loader places the binary at an offset modulo 4k != 0.
This is an issue for EFI, which relies on PE/COFF executables that execute in place for NOR flash, and the way these flash images are constructed (i.e., many different executables loaded dynamically at boot), section alignment is usually set as low as practically feasible.
So ideally, `lld-link` should either relax ADRP/ADD pairs to ADR, or reject `/ALIGN:` directives on the command line that are incompatible with the small code model.
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