| Issue |
170775
|
| Summary |
[RISCV][LV] EVL vectorization doesn't force safe divisor for srem/sdiv when diving by a loop invariant scalar.
|
| Labels |
backend:RISC-V,
vectorizers
|
| Assignees |
|
| Reporter |
topperc
|
When using EVL vectorization, the vectorizer does not force a safe divisor for srem/sdiv for elements past VL when dividing by a loop invariant scalar.
If the loop invariant scalar is -1 at runtime, this divides poison by -1 which would overflow if the poison elemnet is INT_MIN at runtime. RISC-V doesn't trap for overflow, but this is UB according to IR semantics.
https://godbolt.org/z/1zrGxodMM
CC: @preames @lukel97 @fhahn @arcbbb @ElvisWang123
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