| Issue |
162567
|
| Summary |
[AArch64] Use zero register directly for inline assembly
|
| Labels |
backend:AArch64,
inline-asm
|
| Assignees |
|
| Reporter |
nathanchance
|
Forwarded on from a downstream report: https://github.com/ClangBuiltLinux/linux/issues/2127
GCC directly generates `xzr` or `wzr` for the `rZ` constraint when the `%x` or `%w` modifier are used, whereas clang always stores to an intermediate register.
```
void write_zero_x(volatile unsigned long *addr)
{
asm volatile("str %x1, %0\n" : : "Qo" (*addr), "rZ" (0));
}
void write_zero_w(volatile unsigned long *addr)
{
asm volatile("str %w1, %0\n" : : "Qo" (*addr), "rZ" (0));
}
```
GCC 15.2.0:
```
$ aarch64-linux-gcc -O2 -c test.c
$ llvm-objdump -dr test.o
test.o: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <write_zero_x>:
0: f900001f str xzr, [x0]
4: d65f03c0 ret
0000000000000008 <write_zero_w>:
8: b900001f str wzr, [x0]
c: d65f03c0 ret
```
clang @ cd33c6b68e7010679517416e87a8abd860bdc747:
```
$ clang --target=aarch64-linux -O2 -c test.c
$ llvm-objdump -dr test.o
test.o: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <write_zero_x>:
0: 2a1f03e8 mov w8, wzr
4: f9000008 str x8, [x0]
8: d65f03c0 ret
000000000000000c <write_zero_w>:
c: 2a1f03e8 mov w8, wzr
10: b9000008 str w8, [x0]
14: d65f03c0 ret
```
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