| Issue |
161759
|
| Summary |
AMDGPU register classes including pseudo-registers should not be allocatable
|
| Labels |
backend:AMDGPU
|
| Assignees |
|
| Reporter |
arsenm
|
Several of the SGPR register classes, particularly [SReg_32_XM0_XEXEC](https://github.com/llvm/llvm-project/blob/487cdf14f67e95f61a42389bd168b32c00995ea4/llvm/lib/Target/AMDGPU/SIRegisterInfo.td#L786) include non-allocatable source values.
These classes should be split up. The cases that include the non-allocatable source values should only be used in an isAllocatable=0 class used as the register class of source operands, and not the same register class as used for virtual registers
![]()
_______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
