| Issue |
141885
|
| Summary |
[RISCV] Can we teach RISCVectorPeephole to commute FMA to fold vmerge?
|
| Labels |
backend:RISC-V
|
| Assignees |
|
| Reporter |
topperc
|
We have special isel patterns like `VPatFPMulAccVL_VV_VF_RM` and `VPatMultiplyAccVL_VV_VX` that look for riscv_vmerge_vl and an fma or mul+add. Can improve RISCVectorPeephole to remove these patterns?
CC: @lukel97 @preames
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