| Issue |
139622
|
| Summary |
AMDGPU mishandles canonicalize with ieee mode disabled
|
| Labels |
backend:AMDGPU,
miscompilation
|
| Assignees |
|
| Reporter |
arsenm
|
With the IEEE mode bit disabled (i.e. shaders or any function with the `"amdgpu-ieee"="false"` attribute, the canonicalize intrinsic is not implemented correctly. No floating point instruction will quiet a signaling nan in this mode. We need to do something else to ensure a signaling nan is quieted.
```
; llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefix=GFX8 %s
; llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefix=GFX9 %s
; These do not quiet with ieee=0
; GFX8 v_mul_f32_e32 v0, 1.0, v0
; GFX9: v_max_f32_e32 v0, v0, v0
define float @canonicalize(float %x) "amdgpu-ieee"="false" {
%result = call float @llvm.canonicalize.f32(float %x)
ret float %result
}
; For gfx9 (and gfx8 without daz/ftz), maybe can do this:
; s_mov_b32 s4, 0x7fc00000
; v_max_f32_e64 v0, v0, s4
; The documentation pseudocode suggests this is biased to return src1
; if src0 is a nan.
; For gfx8, this will still not flush if daz/ftz is enabled. Probably
; need to do both:
; s_mov_b32 s4, 0x7fc00000
; v_max_f32_e64 v0, v0, s4
; v_mul_f32_e32 v0, 1.0, v0
```
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