| Issue |
137736
|
| Summary |
[RISCV] `clang` permits invalid operand for `Zclsd` instructions in inline assembly when using any optimization level other than `-O0`
|
| Labels |
|
| Assignees |
|
| Reporter |
thebigclub
|
The `Zclsd` [extension](https://github.com/riscv/riscv-isa-manual/blob/main/src/zilsd.adoc) requires the use of registers in the range of `x8-15` for `c.ld` and `c.sd` instructions. `clang` will use an invalid register when the compiler is free to choose the destination. This occurs for both the `I` and `E` base ISAs:
```bash
$ cat << EOF > test.c
#include <stdint.h>
int fn(void *arg1, int arg2, int arg3, int arg4, int arg5) {
uint64_t val;
asm volatile ("c.ld %0, 0(%1)"
: "=R" (val)
: "r" (arg1)
);
return val + arg2 + arg3 + arg4 + arg5;
}
EOF
$ for isa in i e; do for level in 0 1 2 3 s z; do (set -x; clang -march=rv32"$isa"_zclsd -O"$level" -c test.c); echo Return value: $?; done; done
+ clang -march=rv32i_zclsd -O0 -c test.c
Return value: 0
+ clang -march=rv32i_zclsd -O1 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld a6, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32i_zclsd -O2 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld a6, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32i_zclsd -O3 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld a6, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32i_zclsd -Os -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld a6, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32i_zclsd -Oz -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld a6, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32e_zclsd -O0 -c test.c
Return value: 0
+ clang -march=rv32e_zclsd -O1 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld t1, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32e_zclsd -O2 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld t1, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32e_zclsd -O3 -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld t1, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32e_zclsd -Os -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld t1, 0(a0)
| ^
1 error generated.
Return value: 1
+ clang -march=rv32e_zclsd -Oz -c test.c
test.c:6:23: error: invalid operand for instruction
6 | asm volatile ("c.ld %0, 0(%1)"
| ^
<inline asm>:1:7: note: instantiated into assembly here
1 | c.ld t1, 0(a0)
| ^
1 error generated.
Return value: 1
$ clang -v
clang version 21.0.0git (https://github.com/llvm/llvm-project.git 913dcf1aa36f3ea2d67a0d2b05b9d1375987e553)
Target: riscv32-unknown-unknown-elf
```
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