| Issue |
136087
|
| Summary |
[RISCV] Missing register overlap check for XTheadMemPair loads
|
| Labels |
good first issue,
backend:RISC-V
|
| Assignees |
|
| Reporter |
topperc
|
The XTheadMemPair extension requires rs1 != rd1 && rs1 != rd2 && rd1 != rd2. We don't check for this in the assembler today, but binutils does.
We need to add a check to validateInstruction in RISCVAsmParser.cpp
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