| Issue |
135743
|
| Summary |
[LLVM][RISCV]when use -O1/O2/O3(inline) the early-clobber attribute will lose its effect, and cause compilation error
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
hippyll123
|
The code is as follows:
`
#include <stdio.h>
#include <stdlib.h>
#include <riscv_vector.h>
//__attribute__((noinline))
//__attribute__((always_inline))
vfloat32m2_t __riscv_vfwcvt_f_f_v_f32m2(vfloat16m1_t src, size_t vl) {
int ret = 0;
__volatile__ vfloat32m2_t vz;
unsigned long vtypevl = 0;
asm volatile("vsetvli %1, %4, e16, m1, tu, mu\n\t"
"csrr %0, vtype\n\t"
"ori %0, %0, 1024\n\t"
"vsetvl %1, %4, %0\n\t"
"vfwcvt.f.f.v %2, %3\n\t"
: "=r"(vtypevl), "=r"(ret), "=&vr"(vz)
: "vr"(src), "r"(vl));
return vz;
}
int main() {
vfloat16m1_t aaa;
vfloat32m2_t bbb;
size_t l;
bbb = __riscv_vfwcvt_f_f_v_f32m2(aaa, l);
}
`
when compile in -O1, will report compile error
`
test.cpp:14:29: error: the destination vector register group cannot overlap the source vector register group
14 | "vsetvl %1, %4, %0\n\t"
| ^
<inline asm>:5:15: note: instantiated into assembly here
5 | vfwcvt.f.f.v v8, v8
| ^
1 error generated.
`
compile command is:
`
// pass
clang++ --target=riscv64-unknown-linux-gnu test.cpp -O0 -mrvv-vector-bits=2048 test.cpp -S --sysroot=/path/to/sysroot/riscv64-unknown-elf
// fail
clang++ --target=riscv64-unknown-linux-gnu test.cpp -O1 -mrvv-vector-bits=2048 test.cpp -S --sysroot=/path/to/sysroot/riscv64-unknown-elf
`
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