Issue 130020
Summary AMDGPU pass does not respect register class constraint when folding immediate into copies
Labels backend:AMDGPU, crash-on-valid
Assignees
Reporter arsenm
    ```
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-fold-operands -verify-machineinstrs -o - %s

# av_class constraint is not respected, and copy is replaced with an illegal v_mov_b32

---
name: s_mov_b32_imm_literal_copy_s_to_av_32
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 999
    %1:av_32 = COPY %0
 $agpr0 = COPY %1
    S_ENDPGM 0
...

---
name: v_mov_b32_imm_literal_copy_v_to_av_32
tracksRegLiveness: true
body: |
  bb.0:
    %0:vgpr_32 = V_MOV_B32_e32 999, implicit $exec
 %1:av_32 = COPY %0
    $agpr0 = COPY %1
    S_ENDPGM 0

...

```

This hits a machine verifier failure:
```
Append normal operand 1
  %1:av_32 = V_MOV_B32_e32 %0:vgpr_32
Folded source from %0:vgpr_32 = V_MOV_B32_e32 999, implicit $exec
 into OpNo 1 of %1:av_32 = V_MOV_B32_e32 999, implicit $exec

# After SI Fold Operands
# Machine code for function v_mov_b32_imm_literal_copy_v_to_av_32: IsSSA, NoPHIs, TracksLiveness

bb.0:
  %1:av_32 = V_MOV_B32_e32 999, implicit $exec
 $agpr0 = COPY %1:av_32
  S_ENDPGM 0

# End machine code for function v_mov_b32_imm_literal_copy_v_to_av_32.

*** Bad machine code: Illegal virtual register for instruction ***
- function: v_mov_b32_imm_literal_copy_v_to_av_32
- basic block: %bb.0  (0x13b009928)
- instruction: %1:av_32 = V_MOV_B32_e32 999, implicit $exec
- operand 0: %1:av_32
Expected a VGPR_32 register, but got a AV_32 register

```

It is not possible to directly write a literal value to an AGPR, so it is not legal to fold these 
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