| Issue |
128650
|
| Summary |
AMDGPU GlobalIsel mishandles readfirstlane lowering with 64-bit element vectors
|
| Labels |
backend:AMDGPU,
llvm:globalisel,
crash-on-valid
|
| Assignees |
vikramRH
|
| Reporter |
arsenm
|
d7903c9f28bdfd17fcc2d5be1096c504b6a94ec1 added commented out tests which fail with globalisel. The vector construction assumes 32-bit elements:
```
RUN: at line 3: /Users/matt/src/llvm-project/build_rel_with_debinfo/bin/llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -global-isel -global-isel-abort=2 < /Users/matt/src/llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll | /Users/matt/src/llvm-project/build_rel_with_debinfo/bin/FileCheck -check-prefix=CHECK-GISEL -enable-var-scope /Users/matt/src/llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
+ /Users/matt/src/llvm-project/build_rel_with_debinfo/bin/llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -global-isel -global-isel-abort=2
+ /Users/matt/src/llvm-project/build_rel_with_debinfo/bin/FileCheck -check-prefix=CHECK-GISEL -enable-var-scope /Users/matt/src/llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
# After Legalizer
# Machine code for function test_readfirstlane_v2i64: IsSSA, TracksLiveness, Legalized
Function Live Ins: $sgpr4_sgpr5 in %2, $sgpr6_sgpr7 in %3, $sgpr8_sgpr9 in %4, $sgpr10_sgpr11 in %5, $sgpr12 in %6, $sgpr13 in %7, $sgpr14 in %8, $sgpr15 in %9
bb.1 (%ir-block.0):
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
%12:_(s32) = COPY $vgpr2
%13:_(s32) = COPY $vgpr3
%14:_(s32) = COPY $vgpr4
%15:_(s32) = COPY $vgpr5
%24:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %12:_(s32)
%25:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %13:_(s32)
%26:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %14:_(s32)
%27:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %15:_(s32)
%18:_(<2 x s64>) = G_BUILD_VECTOR %24:_(s32), %25:_(s32), %26:_(s32), %27:_(s32)
%19:sgpr_128 = COPY %18:_(<2 x s64>)
INLINEASM &"; use $0" [sideeffect] [attdialect], $0:[reguse:SGPR_128], %19:sgpr_128
SI_RETURN
# End machine code for function test_readfirstlane_v2i64.
*** Bad machine code: G_BUILD_VECTOR result element type must match source type ***
- function: test_readfirstlane_v2i64
- basic block: %bb.1 (0x151098440)
- instruction: %18:_(<2 x s64>) = G_BUILD_VECTOR %24:_(s32), %25:_(s32), %26:_(s32), %27:_(s32)
*** Bad machine code: G_BUILD_VECTOR must have an operand for each elemement ***
- function: test_readfirstlane_v2i64
- basic block: %bb.1 (0x151098440)
- instruction: %18:_(<2 x s64>) = G_BUILD_VECTOR %24:_(s32), %25:_(s32), %26:_(s32), %27:_(s32)
LLVM ERROR: Found 2 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the c
```
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