| Issue |
123999
|
| Summary |
[AArch64] negate + exctract high half can be done with vsubhn
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
dzaima
|
https://godbolt.org/z/hbGc6M3K6
The following functions:
```c
uint8x8_t neg_narrow(uint16x8_t a) {
uint16x8_t b = vmvnq_u16(a);
return vshrn_n_u16(b, 8);
}
uint8x8_t neg_narrow_vsubhn(uint16x8_t a) {
uint16x8_t _ones_ = vdupq_n_u16(0xffff);
return vsubhn_u16(ones, a);
}
```
produce:
```asm
mvn v0.16b, v0.16b
shrn v0.8b, v0.8h, #8
```
whereas they could produce:
```asm
mvni v31.4s, 0
subhn v0.8b, v31.8h, v0.8h
```
This is especially meaningful in a loop, where the constant can be initialized outside of the loop. (whether it's better or worse for a single use depends on architecture)
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