| Issue |
122688
|
| Summary |
GlobalISel sdiv/sext shift right heavy
|
| Labels |
backend:AMDGPU,
llvm:globalisel
|
| Assignees |
|
| Reporter |
tpopp
|
[reduced.gisel.txt](https://github.com/user-attachments/files/18395905/reduced.gisel.txt)
[reduced.sdisel.txt](https://github.com/user-attachments/files/18395904/reduced.sdisel.txt)
[reduced.txt](https://github.com/user-attachments/files/18395903/reduced.txt)
Given input IR like:
```
%i78 = sdiv i32 %i, 128
%i80 = sext i32 %i78 to i64
%i83 = sdiv i64 %i80, 4
```
I see many more `ashr` and `lshr` instructions in the result with global-isel. I believe SDIsel is instead using `v_bfe` instead of some 2-4 SHR instructions.
I've been looking at this and reducing with the instruction `llc -O3 -march=amdgcn -mcpu=gfx942 -mtriple amdgcn-amd-hmcsa ./reduced.ll -global-isel={true,false}`
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