| Issue |
120405
|
| Summary |
[RISCV] vp.merge of nxv16i1 tries to be unrolled
|
| Labels |
backend:RISC-V
|
| Assignees |
|
| Reporter |
lukel97
|
After #101641, this vp merge began to be emitted from the loop vectorizer with EVL tail folding from SPEC CPU 2017:
```llvm
define <vscale x 16 x i1> @f(<vscale x 16 x i1> %m, <vscale x 16 x i1> %x, <vscale x 16 x i1> %y, i32 %evl) {
%1 = tail call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> %m, <vscale x 16 x i1> %x, <vscale x 16 x i1> %y, i32 %evl)
ret <vscale x 16 x i1> %1
}
```
It crashes with `llc -mtriple=riscv64 -mattr=+v` with `LLVM ERROR: Invalid size request on a scalable vector.` because it tries to unroll it when legalizing vector ops. The DAG after type legalization looks like:
```
Type-legalized selection DAG: %bb.0 'f:'
SelectionDAG has 15 nodes:
t0: ch,glue = EntryToken
t2: nxv16i1,ch = CopyFromReg t0, Register:nxv16i1 %0
t4: nxv16i1,ch = CopyFromReg t0, Register:nxv16i1 %1
t6: nxv16i1,ch = CopyFromReg t0, Register:nxv16i1 %2
t8: i64,ch = CopyFromReg t0, Register:i64 %3
t18: i64 = and t8, Constant:i64<4294967295>
t12: nxv16i1 = vp_merge t2, t4, t6, t18
t15: ch,glue = CopyToReg t0, Register:nxv16i1 $v0, t12
t16: ch = RISCVISD::RET_GLUE t15, Register:nxv16i1 $v0, t15:1
```
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