| Issue |
85823
|
| Summary |
[ValueTracking] Missed optimization: Infer known bits from `a & mask == 0`
|
| Labels |
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| Assignees |
|
| Reporter |
XChy
|
Alive2 proof: https://alive2.llvm.org/ce/z/L3E65p
### Motivating example
The automatically reduced IR is:
```llvm
define i1 @src(i32 %conv) {
entry:
%and = and i32 %conv, 1
%cmp = icmp eq i32 %and, 0
br i1 %cmp, label %then, label %else
then:
ret i1 0
else:
call void @dummy()
%and1 = and i32 %conv, 3
%cmp1 = icmp eq i32 %and1, 0
ret i1 %cmp1
}
```
can be folded to:
```llvm
define i1 @tgt(i32 %conv) {
entry:
%and = and i32 %conv, 1
%cmp = icmp eq i32 %and, 0
br i1 %cmp, label %then, label %else
then:
ret i1 0
else:
call void @dummy()
ret i1 0
}
```
Note: The dominating condition in real-world IR is `a & mask1 == 0 || a & mask2 == 0`.
### Real-world motivation
This snippet of IR is derived from [qemu/hw/sd/sd.c](https://github.com/qemu/qemu/blob/ddc27d2ad9361a81c2b3800d14143bf420dae172/hw/sd/sd.c#L917) (after O3 pipeline).
The example above is a reduced version. If you're interested in the original suboptimal IR and optimal IR, see also:https://godbolt.org/z/f6qxcocrE
**Let me know if you can confirm that it's an optimization opportunity, thanks.**
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