https://bugs.llvm.org/show_bug.cgi?id=50132
Bug ID: 50132
Summary: Crash in ARC backend when calling
LLVMTargetMachineEmitToFile
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Register Allocator
Assignee: unassignedb...@nondot.org
Reporter: wenyong.hu...@intel.com
CC: llvm-bugs@lists.llvm.org, quentin.colom...@gmail.com
Created attachment 24804
--> https://bugs.llvm.org/attachment.cgi?id=24804&action=edit
The LLVM IR file converted from wasm bytecodes
Hi,
We are developing WebAssembly runtime which uses LLVM as the JIT/AOT codegen
backend for ARC CPU, and the runtime JIT/AOT compiler converts wasm bytecodes
into LLVM IR, runs optimization passes and finally calls
LLVMTargetMachineEmitToFile API to emit the Assembly file. And when calling
LLVMTargetMachineEmitToFile for some case, if the opt level is larger than
LLVMCodeGenLevelNone, crash occurs and the following error is reported:
LLVM ERROR: Error while trying to spill R4 from class GPR32: Cannot scavenge
register without an emergency spill slot!
For opt level LLVMCodeGenLevelNone, and for other CPU e.g. X86_64 and ARM, it
is OK.
I uploaded the LLVM IR file, could you please help have a check? Thanks.
--
You are receiving this mail because:
You are on the CC list for the bug._______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
