https://bugs.llvm.org/show_bug.cgi?id=50083
Bug ID: 50083
Summary: RISC-V: llvm.fptosi.sat.i32.f32 doesn't work with the
+f feature
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: RISC-V
Assignee: unassignedb...@nondot.org
Reporter: a...@crichton.co
CC: a...@lowrisc.org, llvm-bugs@lists.llvm.org
The Rust compiler recently tried to update --
https://github.com/rust-lang/rust/pull/84339 -- to using LLVM's `fptosi` and
`fptoui` saturating intrinsics for all targets, but we found that on the RISC-V
targets with the `+f` target feature LLVM trips an assertion about being unable
to lower. Specifically this LLVM IR:
target triple = "riscv64-unknown-linux-gnu"
define i32 @foo(float %a) #0 {
start:
%0 = tail call i32 @llvm.fptosi.sat.i32.f32(float %a)
ret i32 %0
}
declare i32 @llvm.fptosi.sat.i32.f32(float)
attributes #0 = { "target-cpu"="generic-rv64" "target-features"="+f" }
yields:
PromoteIntegerOperand Op #1: t11: i64 = fp_to_sint_sat t3, Constant:i32<32>
Do not know how to promote this operator's operand!
UNREACHABLE executed at
/root/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:1480!
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash
backtrace.
Stack dump:
0. Program arguments:
/opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s
-x86-asm-syntax=intel <source>
1. Running pass 'Function Pass Manager' on module '<source>'.
2. Running pass 'RISCV DAG->DAG Pattern Instruction Selection' on function
'@foo'
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