https://bugs.llvm.org/show_bug.cgi?id=48368
Bug ID: 48368
Summary: Support the AArch64 variant PCS symbol st_other value
Product: lld
Version: unspecified
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: ELF
Assignee: unassignedb...@nondot.org
Reporter: smithp...@googlemail.com
CC: llvm-bugs@lists.llvm.org, smithp...@googlemail.com
This is an enhancement request for lld to support the AArch64 variant procedure
call standard (PCS) in LLD. This is needed to support SVE functions that follow
the vector procedure calling standard (a variant procedure call standard that
requires more registers to be saved than normal).
Functions that follow a variant PCS need special handling by a dynamic linker.
To mark such functions the AArch64 ABI defines the st_other value
STO_AARCH64_VARIANT_PCS in ELF for the 64 bit Arm Architecture. This is
documented in:
https://github.com/ARM-software/abi-aa/blob/master/aaelf64/aaelf64.rst#551st_other-values
The static linker's responsibilities with respect to STO_AARCH64_VARIANT_PCS
are small. To quote from the ABI:
"Static linkers must preserve the marking and propagate it to the dynamic
symbol table if any reference or definition of the symbol is marked with
STO_AARCH64_VARIANT_PCS, and add a DT_AARCH64_VARIANT_PCS dynamic tag if
required by the Dynamic Section section."
Message describing motivation and design:
https://sourceware.org/legacy-ml/binutils/2019-05/msg00294.html
LLVM patch that adds STO_AARCH64_VARIANT_PCS to LLVM
https://reviews.llvm.org/D89138
binutils patch https://sourceware.org/pipermail/binutils/2019-May/106963.html
glibc patch to support STO_AARCH64_VARIANT_PCS
https://sourceware.org/pipermail/glibc-cvs/2020q1/069075.html
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