https://bugs.llvm.org/show_bug.cgi?id=43485
Bug ID: 43485
Summary: [AMDGPU][MC][GFX10] SOP instructions with src0=null
cannot be decoded
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
These instructions break disassembler - an assert is triggered. An example:
0x7d,0x00,0x80,0x91
Expected result is the following:
s_ashr_i64 s[0:1], null, s0
Actual result: an assert.
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