https://bugs.llvm.org/show_bug.cgi?id=42079
Bug ID: 42079
Summary: [X86] avx512vl vcvtps2pd isel patterns can narrow a
volatile load
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: craig.top...@gmail.com
CC: craig.top...@gmail.com, llvm-bugs@lists.llvm.org,
llvm-...@redking.me.uk, spatel+l...@rotateright.com
This IR will contains a volatile 128-bit load
define <2 x double> @test(<4 x float>* %x) {
%a = load volatile <4 x float>, <4 x float>* %x
%b = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
%c = fpext <2 x float> %b to <2 x double>
ret <2 x double> %c
}
When compiled with avx512f this assembly is produced which only loads 128 bits.
vcvtps2pd (%rdi), %xmm0
This is probably not the only example of this bug in our isel patterns.
--
You are receiving this mail because:
You are on the CC list for the bug._______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
