https://bugs.llvm.org/show_bug.cgi?id=41504
Bug ID: 41504
Summary: Use of lsl with w registers should warn/error
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AArch64
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected],
[email protected], [email protected],
[email protected]
https://android-review.googlesource.com/c/platform/art/+/940018 shows a fix
that Android's ART team recently made. From that commit, they previously had
inline assembly that did "add x0, x1, w2, lsl #1", which was invalid and would
be treated as "add x0, x1, x2, uxtx #1" which would keep the high bits. They
had to manually change it to do "uxtw" to ignore the high bits.
--
You are receiving this mail because:
You are on the CC list for the bug._______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
