https://bugs.llvm.org/show_bug.cgi?id=40873
Bug ID: 40873
Summary: [AMDGPU][MC] Many operands do not accept constant
expressions for unclear reason
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
Examples:
x = 1
v_or3_b32 v1, v2, v3, 1 // ok
v_or3_b32 v1, v2, v3, x // error
y = 0x11213141
v_madak_f32 v5, v1, v2, 0x11213141 // ok
v_madak_f32 v5, v1, v2, y // error
A list of known issues:
- reg/const (isRegOrInlineNoMods)
- reg/lit (isVSrcB64, isVSrcB16, isVSrcF16, isVSrcF16, isVCSrcV2F16 etc)
- sopp, sopk 16-bit constants
- s_setreg_imm32_b32 32-bit constant
- madak fp constants
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