https://bugs.llvm.org/show_bug.cgi?id=40872
Bug ID: 40872
Summary: [AMDGPU][MC] Different conversion rules for integer
literals and expressions
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
Currently assembler has different conversion rules for integer literals and
expressions which may confuse users.
Compare the rules:
https://llvm.org/docs/AMDGPUOperandSyntax.html#integer-literals
https://llvm.org/docs/AMDGPUOperandSyntax.html#amdgpu-synid-exp-conv
For integer literals, assembler checks that the truncated bits are either all
zero or all ones. In the latter case the MSB of the result after truncation
must be 1. For example, the following code will trigger an error:
v_add_f32 v0, 0x101ffffff00, v0 // error
In contrast, expressions are truncated to the expected operand size. No checks
are performed:
x = 0x101ffffff00
v_add_f32 v0, x, v0 // assembled ok
I believe conversion rules for integer literals and expressions should be as
close as possible.
There is a similar but different issue (bug 40806 "Different conversion rules
for literals and inlinable constants").
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