https://bugs.llvm.org/show_bug.cgi?id=39331
Bug ID: 39331
Summary: [AMDGPU][MC][GFX8+] Disassembled s_set_gpr_idx_on,
s_set_gpr_idx_mode cannot be reassembled
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
These instructions have a 16-bit immediate operand which may be specified as an
integer, for example:
s_set_gpr_idx_on s0, 15
When this code is assembled and then reassembled, the result is the following
code:
s_set_gpr_idx_on s0, dst src0 src1 src2
However assembler does not accept this syntax, so the code cannot be assembled.
Also I'm not sure this is a good syntax; this should be discussed.
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