https://bugs.llvm.org/show_bug.cgi?id=39298
Bug ID: 39298
Summary: [AMDGPU][MC][GFX7] Could 16-bit instructions use
inline literals?
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
GFX7 has only a few 16-bit opcodes, for example v_cvt_f32_f16. Could these
opcodes correctly use inline constants or should they be handled as literals?
Current implementation enables inline constants with v_cvt_f32_f16:
v_cvt_f32_f16_e32 v0, -1 ; encoding: [0xc1,0x16,0x00,0x7e]
In our discussion with Artem (dated back to 03 February, 2017) it was decided
to disable 16-bit incline constants for test generator. They are encoded as
32-bit literals. This result in failures for v_cvt_f32_f16 and
v_cvt_f32_f16_e64.
Could anybody clarify if CI HW supports 16-bit inline constants?
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