https://bugs.llvm.org/show_bug.cgi?id=39159
Bug ID: 39159
Summary: [llvm-exegesis] Instructions should avoid tied
registers (BLENDVPD/BLENDVPS/PBLENDVB etc.)
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: llvm-...@redking.me.uk
CC: andrea.dibia...@gmail.com, clement.cour...@gmail.com,
gchate...@google.com, llvm-bugs@lists.llvm.org
BLENDVPD/BLENDVPS/PBLENDVB use xmm0 as the mask src register, but
llvm-exegesis's uop computation uses this register both as a src and dst,
resulting in spurious results (extra uop counts, stalls etc.)
mode: uops
key:
instructions:
- 'BLENDVPDrm0 XMM0 XMM0 RDI i_0x1x i_0x0x '
- 'BLENDVPDrm0 XMM1 XMM1 RDI i_0x1x i_0x64x '
- 'BLENDVPDrm0 XMM2 XMM2 RDI i_0x1x i_0x128x '
- 'BLENDVPDrm0 XMM3 XMM3 RDI i_0x1x i_0x192x '
- 'BLENDVPDrm0 XMM4 XMM4 RDI i_0x1x i_0x256x '
- 'BLENDVPDrm0 XMM5 XMM5 RDI i_0x1x i_0x320x '
- 'BLENDVPDrm0 XMM6 XMM6 RDI i_0x1x i_0x384x '
- 'BLENDVPDrm0 XMM7 XMM7 RDI i_0x1x i_0x448x '
- 'BLENDVPDrm0 XMM8 XMM8 RDI i_0x1x i_0x512x '
- 'BLENDVPDrm0 XMM9 XMM9 RDI i_0x1x i_0x576x '
- 'BLENDVPDrm0 XMM10 XMM10 RDI i_0x1x i_0x640x '
- 'BLENDVPDrm0 XMM11 XMM11 RDI i_0x1x i_0x704x '
- 'BLENDVPDrm0 XMM12 XMM12 RDI i_0x1x i_0x768x '
- 'BLENDVPDrm0 XMM13 XMM13 RDI i_0x1x i_0x832x '
- 'BLENDVPDrm0 XMM14 XMM14 RDI i_0x1x i_0x896x '
- 'BLENDVPDrm0 XMM15 XMM15 RDI i_0x1x i_0x960x '
config: ''
register_initial_values:
- 'XMM0=0x0'
- 'XMM1=0x0'
- 'XMM2=0x0'
- 'XMM3=0x0'
- 'XMM4=0x0'
- 'XMM5=0x0'
- 'XMM6=0x0'
- 'XMM7=0x0'
- 'XMM8=0x0'
- 'XMM9=0x0'
- 'XMM10=0x0'
- 'XMM11=0x0'
- 'XMM12=0x0'
- 'XMM13=0x0'
- 'XMM14=0x0'
- 'XMM15=0x0'
cpu_name: btver2
llvm_triple: x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
- { debug_string: JFPU0, value: 1.47, per_snippet_value: 23.52, key: JFPU0 }
- { debug_string: JFPU1, value: 1.5349, per_snippet_value: 24.5584, key:
JFPU1 }
- { debug_string: NumMicroOps, value: 4.0158, per_snippet_value: 64.2528,
key: NumMicroOps }
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