https://bugs.llvm.org/show_bug.cgi?id=38639
Bug ID: 38639
Summary: lowerVectorShuffleByMerging128BitLanes - Detected
cycle in SelectionDAG
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: llvm-...@redking.me.uk
CC: craig.top...@gmail.com,
douglas_y...@playstation.sony.com,
greg.bedw...@sony.com, llvm-bugs@lists.llvm.org
D41794 is causing this fuzz test regression:
define <8 x double> @test(<4 x double> %a, <4 x double> %b) {
%1 = shufflevector <4 x double> %a, <4 x double> <double undef, double
0x3FEA435134576E1C, double 0x3FEA435134576E1C, double 0x3FEA435134576E1C>, <8 x
i32> <i32 6, i32 5, i32 2, i32 3, i32 5, i32 1, i32 3, i32 7>
ret <8 x double> %1
}
llc -mcpu=btver2
Detected cycle in SelectionDAG
Offending node:
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
t27: v4f64 = vector_shuffle<0,5,2,7> t27, t26
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