https://bugs.llvm.org/show_bug.cgi?id=38287
Bug ID: 38287
Summary: llvm.experimental.vector.reduce.{fmin,fmax} broken on
Mips
Product: libraries
Version: trunk
Hardware: Other
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
Assignee: unassignedb...@nondot.org
Reporter: dragan.mladjeno...@rt-rk.com
CC: llvm-bugs@lists.llvm.org
Created attachment 20596
--> https://bugs.llvm.org/attachment.cgi?id=20596&action=edit
Reproducer
Running the attached reproducer on trunk after rL332358 results in error:
LLVM ERROR: Cannot select: 0x55877f48eda0: v2i64 = setcc 0x55877f48ed38,
0x55877f48f218, setlt:ch
0x55877f48ed38: v2f64 = bitcast 0x55877f48f350
0x55877f48f350: v2i64 = insert_vector_elt 0x55877f48f280, 0x55877f48ec68,
Constant:i32<1>
0x55877f48f280: v2i64 = insert_vector_elt 0x55877f48ecd0, 0x55877f48eb98,
Constant:i32<0>
0x55877f48ecd0: v2i64 = BUILD_VECTOR Constant:i64<0>, Constant:i64<0>
0x55877f48f010: i64 = Constant<0>
0x55877f48f010: i64 = Constant<0>
0x55877f48eb98: i64,ch = CopyFromReg 0x55877f429508, Register:i64 %0
0x55877f48eb30: i64 = Register %0
0x55877f48ef40: i32 = Constant<0>
0x55877f48ec68: i64,ch = CopyFromReg 0x55877f429508, Register:i64 %1
0x55877f48ec00: i64 = Register %1
0x55877f48f2e8: i32 = Constant<1>
0x55877f48f218: v2f64 = bitcast 0x55877f48efa8
0x55877f48efa8: v2i64 = BUILD_VECTOR 0x55877f48ec68, 0x55877f48ec68
0x55877f48ec68: i64,ch = CopyFromReg 0x55877f429508, Register:i64 %1
0x55877f48ec00: i64 = Register %1
0x55877f48ec68: i64,ch = CopyFromReg 0x55877f429508, Register:i64 %1
0x55877f48ec00: i64 = Register %1
Before the rL332358 the 'setcc setolt' wasn't replaced with 'setcc setlt' which
Mips backend can't select on v2f64 types.
Possibly a second issue is that reduction expansion produces same 'fcmp fast
olt' even when intrinsic is not used in fastmath context.
*** IR Dump After Expand reduction intrinsics ***
; Function Attrs: uwtable
define double @test(<2 x double>) unnamed_addr #0 {
start:
%rdx.shuf = shufflevector <2 x double> %0, <2 x double> undef, <2 x i32> <i32
1, i32 undef>
%rdx.minmax.cmp = fcmp fast olt <2 x double> %0, %rdx.shuf
%rdx.minmax.select = select <2 x i1> %rdx.minmax.cmp, <2 x double> %0, <2 x
double> %rdx.shuf
%1 = extractelement <2 x double> %rdx.minmax.select, i32 0
ret double %1
}
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