https://bugs.llvm.org/show_bug.cgi?id=37789
Bug ID: 37789
Summary: [AArch64] machine combiner converts independent fadds
into dependent fadds
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AArch64
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Copied from:
test/CodeGen/AArch64/fadd-combines.ll
; DAGCombiner transforms this into: (x + 59.0) + (x + 17.0).
; The machine combiner transforms this into a chain of 3 dependent adds:
; ((x + 59.0) + 17.0) + x
define float @fadd_const_multiuse_attr(float %x) #0 {
; CHECK-LABEL: fadd_const_multiuse_attr:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x9, .LCPI8_1
; CHECK-NEXT: adrp x8, .LCPI8_0
; CHECK-NEXT: ldr s1, [x9, :lo12:.LCPI8_1]
; CHECK-NEXT: ldr s2, [x8, :lo12:.LCPI8_0]
; CHECK-NEXT: fadd s1, s0, s1
; CHECK-NEXT: fadd s1, s2, s1
; CHECK-NEXT: fadd s0, s0, s1
; CHECK-NEXT: ret
%a1 = fadd float %x, 42.0
%a2 = fadd float %a1, 17.0
%a3 = fadd float %a1, %a2
ret float %a3
}
---------------------------------------------------------------------------
That's with no CPU model specified. When I tried setting that to various
existing models, the transform doesn't happen.
I don't see why we would do this transform under any circumstances, but I might
be missing some AArch subtlety.
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