https://bugs.llvm.org/show_bug.cgi?id=36832
Bug ID: 36832
Summary: [AMDGPU][MC] MUBUF opcodes with lds attribute should
have no VGPR destination
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
LDS attribute specify that data are returned into LDS instead of VGPRS, so VGPR
destination is not used.
Current implementation follows SP3 syntax which require that dst is specified
even with lds=1.
In the following example v5 is specified but not used:
buffer_load_dword v5, v0, s[8:11], s3 offset:4095 lds
It would be reasonable to change the syntax so that unused register is not
specified.
Should compatibility with SP3 be preserved? So far it was a priority for AMDGPU
assembler implementation.
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