https://bugs.llvm.org/show_bug.cgi?id=36154
Bug ID: 36154
Summary: [AMDGPU][MC][GFX8][GFX9] Incorrect dst/data size for
MIMG opcodes with d16 modifier
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
Currently assembler assumes that MIMG VGPR data size (in dwords) may be
computed as follows:
count_population(dmask) + tfe
However it turned out that d16 affects MIMG data size as well. This is not
described in the spec.
Specifically,
- for GFX8.0, d16 means that data in VGPRs are stored unpacked. Each 16-bit
value occupies one VGPR. The formula shown above holds true.
- for GFX8.1 and GFX9, d16 means that data are stored packed. VGPR data size
(in dwords) shall be computed as follows:
(count_population(dmask) + 1) / 2 + tfe
SP3 assembler does not seem to account for this difference.
NB: this change in d16 behavior affects both assembler and disassembler.
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