https://bugs.llvm.org/show_bug.cgi?id=36001
Bug ID: 36001
Summary: [AMDGPU][MC] r128 modifier of image instructions
should affect SRSRC size
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
r128 modifier specifies 128-bit resource size when present (256-bit by
default). This modifier should affect SRSRC size.
An example of a failed test:
image_atomic_add v5, v1, s[8:11] dmask:0x1 r128
The instruction shown above is how SP3 disassembles the code.
Note: r128 is removed in GFX9 so this issue has low priority
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