https://bugs.llvm.org/show_bug.cgi?id=33013
Bug ID: 33013
Summary: [x86] default codegen should be more branchy
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: spatel+l...@rotateright.com
CC: llvm-bugs@lists.llvm.org
The default x86 target is something like an Intel big core (ie, it's good at
absorbing the cost of correctly predicted branches, good at predicting those
branches, and good at speculating execution past those branches).
Therefore, we shouldn't favor cmov codegen for IR select as much as we
currently do. Example:
int foo(float x) {
if (x < 42.0f)
return x;
return 12;
}
define i32 @foo(float %x) {
%cmp = fcmp olt float %x, 4.200000e+01
%conv = fptosi float %x to i32
%ret = select i1 %cmp, i32 %conv, i32 12
ret i32 %ret
}
$ clang -O2 cmovfp.c -S -o -
movss LCPI0_0(%rip), %xmm1 ## xmm1 = mem[0],zero,zero,zero
ucomiss %xmm0, %xmm1
cvttss2si %xmm0, %ecx
movl $12, %eax
cmoval %ecx, %eax
retq
Note that gcc and icc will use compare and branch on this example.
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