https://llvm.org/bugs/show_bug.cgi?id=31760
Bug ID: 31760
Summary: Assertion failure splitting up <28 x i8> load on ARM.
Product: libraries
Version: 4.0
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
Assignee: unassignedb...@nondot.org
Reporter: t.p.northo...@gmail.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
When loading weird vector types on ARM (and probably others) generic code
mishandles (i.e. asserts) trying to split it up:
$ cat simple.ll
define void @test_silly_load(<28 x i8>* %addr) {
load volatile <28 x i8>, <28 x i8>* %addr
ret void
}
$ llc -mtriple=thumbv7 simple.ll -o -
Should be fixed on trunk by r293086, and I think it's a good candidate for 4.0.
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