https://llvm.org/bugs/show_bug.cgi?id=31693
Bug ID: 31693
Summary: Failure to recognise some integer MIN/MAX CLAMP
patterns
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
Assignee: unassignedb...@nondot.org
Reporter: llvm-...@redking.me.uk
CC: fil...@gmail.com, llvm-bugs@lists.llvm.org,
spatel+l...@rotateright.com
Classification: Unclassified
Value clamping is often implemented using either of these patterns:
#define MIN(v,a) ((v) < (a) ? (v) : (a))
#define MAX(v,a) ((v) < (a) ? (a) : (v))
#define CLAMP(v,l,h) MIN(MAX((v),(l)),(h))
//#define CLAMP(v,l,h) ((v) < (l) ? (l) : ((v) > (h) ? (h) : (v)))
void clamp_v4u32(unsigned int *a) {
for (int i = 0; i != 4; ++i, ++a) {
unsigned int v = *a;
v = CLAMP(v, 15, 255);
*a = v;
}
}
The first implementation nicely lowers to a pair of UMIN/UMAX instructions:
llc -mcpu=btver2 -mtriple=x86_64-unknown
define void @clamp_v4u32((i32* nocapture) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2, align 4
%4 = icmp ugt <4 x i32> %3, <i32 15, i32 15, i32 15, i32 15>
%5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 15, i32 15, i32 15, i32
15>
%6 = icmp ult <4 x i32> %5, <i32 255, i32 255, i32 255, i32 255>
%7 = select <4 x i1> %6, <4 x i32> %5, <4 x i32> <i32 255, i32 255, i32 255,
i32 255>
%8 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %7, <4 x i32>* %8, align 4
ret void
}
clamp_v4u32:
vmovdqu (%rdi), %xmm0
vpmaxud .LCPI0_0(%rip), %xmm0, %xmm0
vpminud .LCPI0_1(%rip), %xmm0, %xmm0
vmovdqu %xmm0, (%rdi)
retq
The second struggles fails to recognise that we can safely combine the second
comparison under certain circumstances:
define void @clamp_v4u32(i32* nocapture) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2, align 4
%4 = icmp ult <4 x i32> %3, <i32 15, i32 15, i32 15, i32 15>
%5 = icmp ult <4 x i32> %3, <i32 255, i32 255, i32 255, i32 255>
%6 = select <4 x i1> %5, <4 x i32> %3, <4 x i32> <i32 255, i32 255, i32 255,
i32 255>
%7 = select <4 x i1> %4, <4 x i32> <i32 15, i32 15, i32 15, i32 15>, <4 x
i32> %6
%8 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %7, <4 x i32>* %8, align 4
ret void
}
clamp_v4u32:
vmovdqu (%rdi), %xmm0
vmovdqa .LCPI0_1(%rip), %xmm2 # xmm2 =
[2147483663,2147483663,2147483663,2147483663]
vpxor .LCPI0_0(%rip), %xmm0, %xmm1
vpminud .LCPI0_3(%rip), %xmm0, %xmm0
vpcmpgtd %xmm1, %xmm2, %xmm1
vblendvps %xmm1, .LCPI0_2(%rip), %xmm0, %xmm0
vmovups %xmm0, (%rdi)
retq
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