https://llvm.org/bugs/show_bug.cgi?id=31256
Bug ID: 31256
Summary: Extend register allocator to support undefined
instructions
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: AVR
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
The AVR architecture as a list of instructions which are simply undefined and
will crash the MCU if they are hit.
LLVM has trouble with this as it is not a common concept.
We need to extend the register allocator so that it doesn't attempt to allocate
registers which would cause a given instruction to be undefined.
--
You are receiving this mail because:
You are on the CC list for the bug.
_______________________________________________
llvm-bugs mailing list
[email protected]
http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
